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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-11-10 14:57:10 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-11-13 01:29:13 +0000
commit3614270a7646191d17b2a2cc6009e3c0bb41d47a (patch)
tree5f4938cf6a8268af44010c1a70c6f7920dd08f3e /src/soc/intel/xeon_sp
parentc37e1e6d071cc9c64e99cffa4250e912f70e6ef0 (diff)
downloadcoreboot-3614270a7646191d17b2a2cc6009e3c0bb41d47a.tar.xz
mb/google/reef: Configure IRQs as level triggered for HID over I2C
As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4, the interrupt line used by the device is required to be level triggered. Hence, this change updates the configuration of the HID over I2C devices to be level triggered. References: [1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx BUG=b:172846122 TEST=./util/abuild/abuild Change-Id: Ifc6dd5f6549e7501f350afe8456a9a8096edcc25 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47425 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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