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| author | Jacob Garber <jgarber1@ualberta.ca> | 2020-10-24 16:23:45 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-04 09:38:23 +0000 |
| commit | 6df38700123820fa95ad3de5bfaef6def1a112f2 (patch) | |
| tree | 3d0b57959ca90cc53e405b5e4e24971a833f7fe4 /src/soc/intel/xeon_sp | |
| parent | 5193312e1e26d3e9e865cb4584b823cfe2e52f0d (diff) | |
| download | coreboot-6df38700123820fa95ad3de5bfaef6def1a112f2.tar.xz | |
soc/intel/xeon_sp: Pass IIO_RESOURCE_INSTANCE as pointer
IIO_RESOURCE_INSTANCE is a large struct, so it should be passed as a
constant pointer rather than making a copy.
Found-by: Coverity CID 1432759
Change-Id: Iebbb4d292f4d956e767bda28cbf20b0318586510
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46729
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp')
| -rw-r--r-- | src/soc/intel/xeon_sp/nb_acpi.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c index f6bf6edf90..cf397f7897 100644 --- a/src/soc/intel/xeon_sp/nb_acpi.c +++ b/src/soc/intel/xeon_sp/nb_acpi.c @@ -147,16 +147,16 @@ static unsigned long acpi_fill_slit(unsigned long current) * in the context of ATSR subtable, it adds ATSR subtable when it is first called. */ static unsigned long acpi_create_dmar_ds_pci_br_for_port(unsigned long current, - int port, int stack, IIO_RESOURCE_INSTANCE iio_resource, uint32_t pcie_seg, + int port, int stack, const IIO_RESOURCE_INSTANCE *iio_resource, uint32_t pcie_seg, bool is_atsr, bool *first) { if (soc_get_stack_for_port(port) != stack) return 0; - const uint32_t bus = iio_resource.StackRes[stack].BusBase; - const uint32_t dev = iio_resource.PcieInfo.PortInfo[port].Device; - const uint32_t func = iio_resource.PcieInfo.PortInfo[port].Function; + const uint32_t bus = iio_resource->StackRes[stack].BusBase; + const uint32_t dev = iio_resource->PcieInfo.PortInfo[port].Device; + const uint32_t func = iio_resource->PcieInfo.PortInfo[port].Function; const uint32_t id = pci_mmio_read_config32(PCI_DEV(bus, dev, func), PCI_VENDOR_ID); @@ -253,7 +253,7 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket, hob->PlatformData.IIO_resource[socket]; for (int p = PORT_0; p < MAX_PORTS; ++p) current += acpi_create_dmar_ds_pci_br_for_port(current, p, stack, - iio_resource, pcie_seg, false, NULL); + &iio_resource, pcie_seg, false, NULL); // Add VMD if (hob->PlatformData.VMDStackEnable[socket][stack] && @@ -317,7 +317,7 @@ static unsigned long acpi_create_atsr(unsigned long current, const IIO_UDS *hob) if (socket == 0 && p == PORT_0) continue; current += acpi_create_dmar_ds_pci_br_for_port(current, p, - stack, iio_resource, pcie_seg, true, &first); + stack, &iio_resource, pcie_seg, true, &first); } } if (tmp != current) |