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authorKarthikeyan Ramasubramanian <kramasub@chromium.org>2018-11-14 08:53:01 -0700
committerFurquan Shaikh <furquan@google.com>2018-11-15 19:57:56 +0000
commit017b5c453a72f57ec785da1764939e24651ac5eb (patch)
tree3fc2d39b3e2807856791cdd279aa8c28efa8390e /src/soc/intel
parentb6892969cb79ac9d35a6b00a9de9093bb88378d2 (diff)
downloadcoreboot-017b5c453a72f57ec785da1764939e24651ac5eb.tar.xz
ec/google/chromeec/acpi: Rename EC_ENABLE_TABLET_EVENT config
Rename EC_ENABLE_TABLET_EVENT config as EC_ENABLE_MULTIPLE_DPTF_PROFILES since it aligns with the use-case. BUG=b:118149364 BRANCH=None TEST=Ensured that the expected DPTF table are loaded in different modes (base attached/detached and clamshell/360-flipped) on Soraka and Nautilus. Change-Id: If147f1c79ceaaed00e17ec80ec6c912a8f7a8c2e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/29261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/skylake/acpi/dptf/thermal.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl
index 9798798504..052b7a5e19 100644
--- a/src/soc/intel/skylake/acpi/dptf/thermal.asl
+++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl
@@ -82,13 +82,13 @@ Method (TPET)
*/
Method (DTRP, 2, Serialized)
{
-#ifdef EC_ENABLE_TABLET_EVENT
+#ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES
If (LEqual (\_SB.PCI0.LPCB.EC0.RCTM, One)) {
Return (CTOK (Arg0))
} Else {
#endif
Return (CTOK (Arg1))
-#ifdef EC_ENABLE_TABLET_EVENT
+#ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES
}
#endif
}