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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-29 09:30:23 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-28 20:15:28 +0000 |
| commit | 22f54c5a81bf387edcd7ea792bc1717c554054c6 (patch) | |
| tree | 82d5b1ba80b9046594393590f84ac677e2f0ac29 /src/soc/intel | |
| parent | 3a649eec28b9440a628626a7b882a9fb185a9a4a (diff) | |
| download | coreboot-22f54c5a81bf387edcd7ea792bc1717c554054c6.tar.xz | |
amd/stoneyridge: Add NV storage to ramtop
The scratch registers in northbridge used for storing the top of
cacheable memory are volatile. Use the BiosRam storage in the FCH
instead.
TEST=Suspend and resume Kahlee with complete S3 patch stack
BUG=b:69614064
Change-Id: Ieb3cfd173c70bf899a6391d62d1df87b38485f30
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions