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authorRonak Kanabar <ronak.kanabar@intel.com>2020-03-04 19:03:47 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-03-11 14:38:17 +0000
commit35d78437991a60882f52dcfe0f653966f10041ff (patch)
tree5dd9ccceec236ba663a24f12a1f69fc74639a234 /src/soc/intel
parent840bef061fca0ee40619e43e75ab073e9dab2d0a (diff)
downloadcoreboot-35d78437991a60882f52dcfe0f653966f10041ff.tar.xz
soc/intel/tigerlake: Correct FSP log interface
select correct UART settings according to Kconfig DEBUG_INTERFACE_UART: Legacy UART DEBUG_INTERFACE_SERIAL_IO: PCH UART Add check for DEBUG_INTERFACE_TRACEHUB selection and set "PcdDebugInterfaceFlags" UPD accordingly. BUG=None TEST=boot jslrvp board with Debug FSP and check FSP UART log Change-Id: I7be7f93082f9c64c1c45963d70ee2e3b3d29986a Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39280 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/tigerlake/chip.h6
-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params_jsl.c12
2 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index d2ea0ddd2f..d23148aac8 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -193,6 +193,12 @@ struct soc_intel_tigerlake_config {
*/
uint8_t SerialIoGSpiCsState[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
+ /*
+ * TraceHubMode config
+ * 0: Disable, 1: Target Debugger Mode, 2: Host Debugger Mode
+ */
+ uint8_t TraceHubMode;
+
/* Debug interface selection */
enum {
DEBUG_INTERFACE_RAM = (1 << 0),
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
index 9c70f2ece1..a5c4c907e2 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
@@ -69,8 +69,18 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Set CPU Ratio */
m_cfg->CpuRatio = 0;
+
+ /* Set debug interface flags */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
- DEBUG_INTERFACE_UART : DEBUG_INTERFACE_TRACEHUB;
+ DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
+
+ /* TraceHub configuration */
+ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
+ if (dev && dev->enabled && config->TraceHubMode) {
+ m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB;
+ m_cfg->PchTraceHubMode = config->TraceHubMode;
+ m_cfg->CpuTraceHubMode = config->TraceHubMode;
+ }
/* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */
m_cfg->VmxEnable = CONFIG(ENABLE_VMX);