diff options
| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-04-29 19:11:30 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-30 16:57:19 +0200 |
| commit | 40e2004abf4f763f38bfb12069b683554644734a (patch) | |
| tree | 119917241ce54646cf9e64220db29ba0bcd58468 /src/soc/intel | |
| parent | c41fd4b75c223d1ef44e8b7820a94801752790fc (diff) | |
| download | coreboot-40e2004abf4f763f38bfb12069b683554644734a.tar.xz | |
intel/broadwell: bootstate mechanism only exists in ramstage
So don't try to use it elsewhere.
Change-Id: Ia600ba654bde36d3ea8a0f3185afae00fe50bfe9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10030
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/broadwell/spi.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index 0fca05951b..36558a1db9 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -312,12 +312,14 @@ void spi_init(void) pci_write_config_byte(dev, 0xdc, bios_cntl | 0x1); } +#if ENV_RAMSTAGE static void spi_init_cb(void *unused) { spi_init(); } BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL); +#endif int spi_claim_bus(struct spi_slave *slave) { |