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authorV Sowmya <v.sowmya@intel.com>2020-06-18 13:41:07 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-06-22 11:59:39 +0000
commit51f0129ffd9191356167056f56c690082bebabf2 (patch)
treecc7dac9b1bdd65fc98d33faa4c7f795aa8835413 /src/soc/intel
parent8e91509a927059d0253528cd646e80d2dda03a2c (diff)
downloadcoreboot-51f0129ffd9191356167056f56c690082bebabf2.tar.xz
soc/intel/tigerlake: Update platform.asl to ASL2.0 syntax
This change updates platform.asl to use ASL2.0 syntax. This increases the readability of the ASL code. TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for volteer. Change-Id: I248f5e9a1e3ba4f6426167f0406073252cc6513a Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42506 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/tigerlake/acpi/platform.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/acpi/platform.asl b/src/soc/intel/tigerlake/acpi/platform.asl
index 73458641fa..4b01aeb464 100644
--- a/src/soc/intel/tigerlake/acpi/platform.asl
+++ b/src/soc/intel/tigerlake/acpi/platform.asl
@@ -16,5 +16,5 @@
Method (_PIC, 1)
{
/* Remember the OS' IRQ routing choice. */
- Store (Arg0, PICM)
+ PICM = Arg0
}