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authorSubrata Banik <subrata.banik@intel.com>2018-11-06 16:59:56 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-11-07 16:41:49 +0000
commit69b18f0b6826ecfd794594b4ae5ebf299e9378ba (patch)
tree5659c9834831295b6d05a1fe1f3c05ad6e8f53b7 /src/soc/intel
parent85376bfd9b018820e84fec92471d13717ad14083 (diff)
downloadcoreboot-69b18f0b6826ecfd794594b4ae5ebf299e9378ba.tar.xz
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation
This changes uses drivers/intel/wifi chip for CNVi device to ensure that: 1. Correct device name shows in ACPI name space 2. Correct wake up shows in cat /proc/acpi/wakeup 3. Remove cnvi.asl from soc/intel/cannonlake Change-Id: Ic81de2dce6045ced913766790a40ed19119f5118 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/29399 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/cannonlake/acpi/cnvi.asl32
-rw-r--r--src/soc/intel/cannonlake/acpi/southbridge.asl3
-rw-r--r--src/soc/intel/cannonlake/chip.h1
3 files changed, 1 insertions, 35 deletions
diff --git a/src/soc/intel/cannonlake/acpi/cnvi.asl b/src/soc/intel/cannonlake/acpi/cnvi.asl
deleted file mode 100644
index f9aeeb06e0..0000000000
--- a/src/soc/intel/cannonlake/acpi/cnvi.asl
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <soc/pm.h>
-
-/* CNVi Controller 0:14.3 */
-Device (CNVI) {
- Name(_ADR, 0x00140003)
-
- Name (_S3D, 3) /* D3 supported in S3 */
- Name (_S0W, 3) /* D3 can wake device in S0 */
- Name (_S3W, 3) /* D3 can wake system from S3 */
-
- Name (_PRW, Package() { PME_B0_EN_BIT, 3 })
-
- Method (_STA, 0)
- {
- Return (0xF)
- }
-}
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index 49b5f6e509..eabff66738 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -60,8 +60,5 @@
/* PCI _OSC */
#include <soc/intel/common/acpi/pci_osc.asl>
-/* CNVi */
-#include "cnvi.asl"
-
/* GBe 0:1f.6 */
#include "pch_glan.asl"
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 74cb833bf6..2deb35fdb8 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -25,6 +25,7 @@
#include <soc/gpio.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
+#include <soc/pm.h>
#include <soc/pmc.h>
#include <soc/serialio.h>
#include <soc/usb.h>