diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-18 22:49:36 +0100 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-20 20:27:51 +0000 |
commit | a1e22b8192d5fc85995a41d0961c25293ba4391f (patch) | |
tree | 7b7dbc885d3ac99fe029cf0961eda1052e753dc1 /src/soc/intel | |
parent | 0eb4db185cfef44ddfdbd91d4fe69a48c127fa84 (diff) | |
download | coreboot-a1e22b8192d5fc85995a41d0961c25293ba4391f.tar.xz |
src: Use 'include <string.h>' when appropriate
Drop 'include <string.h>' when it is not used and
add it when it is missing.
Also extra lines removed, or added just before local includes.
Change-Id: Iccac4dbaa2dd4144fc347af36ecfc9747da3de20
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31966
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel')
35 files changed, 11 insertions, 31 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index bef7052cea..47fbc0db60 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -48,7 +48,6 @@ #include <soc/romstage.h> #include <soc/systemagent.h> #include <spi_flash.h> -#include <string.h> #include <timer.h> #include <timestamp.h> #include "chip.h" diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c index 66a1a1abcc..a85ad1f6b9 100644 --- a/src/soc/intel/apollolake/uart.c +++ b/src/soc/intel/apollolake/uart.c @@ -24,7 +24,6 @@ #include <intelblocks/uart.h> #include <soc/gpio.h> #include <soc/pci_devs.h> -#include <string.h> /* UART pad configuration. Support RXD and TXD for now. */ const struct uart_gpio_pad_config uart_gpio_pads[] = { diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index a5946bccf1..24469ea3a5 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <string.h> #include <arch/acpi.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c index ec0aa8585b..42bc518f36 100644 --- a/src/soc/intel/baytrail/smm.c +++ b/src/soc/intel/baytrail/smm.c @@ -20,8 +20,6 @@ #include <arch/io.h> #include <device/mmio.h> #include <cpu/x86/smm.h> -#include <string.h> - #include <soc/iomap.h> #include <soc/pmc.h> #include <soc/smm.h> diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 7b01cfa8e1..0289e8b4de 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -30,6 +30,7 @@ #include <device/pci_ids.h> #include <pc80/mc146818rtc.h> #include <drivers/uart/uart8250reg.h> +#include <string.h> #include <soc/iomap.h> #include <soc/irq.h> diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index 1faf6516b3..d5b962ffe7 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -13,9 +13,9 @@ */ /* This file is derived from the flashrom project. */ + #include <stdint.h> #include <stdlib.h> -#include <string.h> #include <bootstate.h> #include <delay.h> #include <device/mmio.h> diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c index b8362cdc58..d6a1cda8b3 100644 --- a/src/soc/intel/braswell/ramstage.c +++ b/src/soc/intel/braswell/ramstage.c @@ -38,6 +38,7 @@ #include <soc/intel/common/acpi.h> #include <boardid.h> #include <stdlib.h> +#include <string.h> #define SHOW_PATTRS 1 diff --git a/src/soc/intel/braswell/smm.c b/src/soc/intel/braswell/smm.c index 6f54d78aef..fe681c9d90 100644 --- a/src/soc/intel/braswell/smm.c +++ b/src/soc/intel/braswell/smm.c @@ -24,7 +24,6 @@ #include <soc/iomap.h> #include <soc/pm.h> #include <soc/smm.h> -#include <string.h> /* Save settings which will be committed in SMI functions. */ static uint32_t smm_save_params[SMM_SAVE_PARAM_COUNT]; diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index c87232dd92..b968283fe7 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -14,6 +14,7 @@ */ /* This file is derived from the flashrom project. */ + #include <device/mmio.h> #include <device/pci_ops.h> #include <bootstate.h> @@ -28,7 +29,6 @@ #include <spi-generic.h> #include <stdint.h> #include <stdlib.h> -#include <string.h> typedef struct spi_slave ich_spi_slave; diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index d274be8c42..5592538ab3 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <string.h> #include <arch/cpu.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/broadwell/gpio.c b/src/soc/intel/broadwell/gpio.c index 50f6a29e0d..81ad9d4266 100644 --- a/src/soc/intel/broadwell/gpio.c +++ b/src/soc/intel/broadwell/gpio.c @@ -14,7 +14,6 @@ */ #include <stdint.h> -#include <string.h> #include <arch/io.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c index f87b8a2afc..9aab0d10a6 100644 --- a/src/soc/intel/broadwell/smi.c +++ b/src/soc/intel/broadwell/smi.c @@ -20,7 +20,6 @@ #include <arch/io.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> -#include <string.h> #include <soc/iomap.h> #include <soc/pch.h> #include <soc/pm.h> diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index d8127577db..01d2830481 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -14,7 +14,6 @@ /* This file is derived from the flashrom project. */ #include <stdint.h> #include <stdlib.h> -#include <string.h> #include <bootstate.h> #include <commonlib/helpers.h> #include <delay.h> diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c index aef1d1cd44..c6444b15e8 100644 --- a/src/soc/intel/broadwell/systemagent.c +++ b/src/soc/intel/broadwell/systemagent.c @@ -23,7 +23,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <stdlib.h> -#include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/cpu.h> #include <soc/iomap.h> diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index 993e7f3d4a..d50c6894d0 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -27,7 +27,6 @@ #include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> -#include <string.h> #if CONFIG(HAVE_ACPI_TABLES) const char *soc_acpi_name(const struct device *dev) diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c index d03d21e3c1..421cafc718 100644 --- a/src/soc/intel/cannonlake/uart.c +++ b/src/soc/intel/cannonlake/uart.c @@ -23,7 +23,6 @@ #include <soc/pch.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -#include <string.h> /* Serial IO UART controller legacy mode */ #define PCR_SERIAL_IO_GPPRVRW7 0x618 diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index e311ae6210..c872e51578 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -13,6 +13,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/acpigen.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> @@ -30,6 +31,7 @@ #include <soc/iomap.h> #include <soc/nvs.h> #include <soc/pm.h> +#include <string.h> __attribute__((weak)) unsigned long acpi_fill_mcfg(unsigned long current) { diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 2e3b99e167..455b13ccb7 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -26,7 +26,6 @@ #include <spi_flash.h> #include <spi-generic.h> #include <stdlib.h> -#include <string.h> /* * Get the FAST_SPIBAR. diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 7f213722de..b89bf6f31e 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -27,7 +27,6 @@ #include <soc/pci_devs.h> #include <soc/iomap.h> #include <soc/nvs.h> -#include <string.h> #define UART_PCI_ENABLE (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER) #define UART_CONSOLE_INVALID_INDEX 0xFF diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c index 77f8c1e227..1b3a82a088 100644 --- a/src/soc/intel/common/mma.c +++ b/src/soc/intel/common/mma.c @@ -18,6 +18,7 @@ #include <cbmem.h> #include <console/console.h> #include <soc/intel/common/mma.h> +#include <string.h> #define MMA_TEST_METADATA_FILENAME "mma_test_metadata.bin" #define MMA_TEST_NAME_TAG "MMA_TEST_NAME" diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index 6f79466b10..99d8a35ea7 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -21,7 +21,6 @@ #include <soc/pci_devs.h> #include <soc/pcr_ids.h> #include <soc/soc_chip.h> -#include <string.h> #define PCR_DMI_GCS 0x274C #define PCR_DMI_GCS_BILD (1 << 0) diff --git a/src/soc/intel/denverton_ns/csme_ie_kt.c b/src/soc/intel/denverton_ns/csme_ie_kt.c index 5f90185183..5967840609 100644 --- a/src/soc/intel/denverton_ns/csme_ie_kt.c +++ b/src/soc/intel/denverton_ns/csme_ie_kt.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <stdlib.h> -#include <string.h> #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> diff --git a/src/soc/intel/denverton_ns/include/soc/soc_util.h b/src/soc/intel/denverton_ns/include/soc/soc_util.h index 91bd12eead..c34894871e 100644 --- a/src/soc/intel/denverton_ns/include/soc/soc_util.h +++ b/src/soc/intel/denverton_ns/include/soc/soc_util.h @@ -19,6 +19,7 @@ #ifndef __ACPI__ #include <device/device.h> +#include <string.h> /* Silicon revisions */ typedef enum { diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c index 9d3fa75a6a..2df6994fcd 100644 --- a/src/soc/intel/denverton_ns/smm.c +++ b/src/soc/intel/denverton_ns/smm.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <arch/io.h> #include <cpu/x86/smm.h> -#include <string.h> #include <soc/iomap.h> #include <soc/soc_util.h> diff --git a/src/soc/intel/denverton_ns/soc_util.c b/src/soc/intel/denverton_ns/soc_util.c index 1e44021d92..ba7ba0f0b7 100644 --- a/src/soc/intel/denverton_ns/soc_util.c +++ b/src/soc/intel/denverton_ns/soc_util.c @@ -20,7 +20,7 @@ #include <device/pci.h> #include <device/pci_def.h> #include <device/device.h> - +#include <string.h> #include <soc/iomap.h> #include <soc/soc_util.h> #include <soc/pmc.h> diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index e715469be9..cc1d696d77 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -24,7 +24,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <stdlib.h> -#include <string.h> #include <timer.h> #include <soc/iomap.h> diff --git a/src/soc/intel/fsp_baytrail/smm.c b/src/soc/intel/fsp_baytrail/smm.c index 651e7d13a5..94b09449c0 100644 --- a/src/soc/intel/fsp_baytrail/smm.c +++ b/src/soc/intel/fsp_baytrail/smm.c @@ -20,8 +20,6 @@ #include <arch/io.h> #include <device/mmio.h> #include <cpu/x86/smm.h> -#include <string.h> - #include <soc/iomap.h> #include <soc/pmc.h> #include <soc/smm.h> diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 573c1c4390..979ee573bb 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -15,9 +15,9 @@ */ /* This file is derived from the flashrom project. */ + #include <stdint.h> #include <stdlib.h> -#include <string.h> #include <commonlib/helpers.h> #include <delay.h> #include <device/mmio.h> diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c index 348e1c00f1..6b1484577d 100644 --- a/src/soc/intel/fsp_broadwell_de/chip.c +++ b/src/soc/intel/fsp_broadwell_de/chip.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <string.h> #include <bootstate.h> #include <console/console.h> #include <device/device.h> diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 0978ab3dea..0e4388efd6 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -28,7 +28,6 @@ #include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> -#include <string.h> #if CONFIG(HAVE_ACPI_TABLES) const char *soc_acpi_name(const struct device *dev) diff --git a/src/soc/intel/icelake/romstage/power_state.c b/src/soc/intel/icelake/romstage/power_state.c index cfeffbbb1c..40775509e4 100644 --- a/src/soc/intel/icelake/romstage/power_state.c +++ b/src/soc/intel/icelake/romstage/power_state.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <intelblocks/pmclib.h> #include <intelblocks/tco.h> -#include <string.h> #include <soc/pci_devs.h> #include <soc/pm.h> diff --git a/src/soc/intel/icelake/uart.c b/src/soc/intel/icelake/uart.c index d03d21e3c1..421cafc718 100644 --- a/src/soc/intel/icelake/uart.c +++ b/src/soc/intel/icelake/uart.c @@ -23,7 +23,6 @@ #include <soc/pch.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -#include <string.h> /* Serial IO UART controller legacy mode */ #define PCR_SERIAL_IO_GPPRVRW7 0x618 diff --git a/src/soc/intel/quark/spi.c b/src/soc/intel/quark/spi.c index 0822e7d28d..7ffa203bdc 100644 --- a/src/soc/intel/quark/spi.c +++ b/src/soc/intel/quark/spi.c @@ -25,6 +25,7 @@ #include <soc/pci_devs.h> #include <soc/QuarkNcSocId.h> #include <soc/spi.h> +#include <string.h> struct spi_context spi_driver_context = { NULL, diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 0ff5a137c6..0343a237f8 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <string.h> #include <chip.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/skylake/uart.c b/src/soc/intel/skylake/uart.c index 53d408aebc..1b2a7428df 100644 --- a/src/soc/intel/skylake/uart.c +++ b/src/soc/intel/skylake/uart.c @@ -23,7 +23,6 @@ #include <soc/bootblock.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -#include <string.h> /* Serial IO UART controller legacy mode */ #define PCR_SERIAL_IO_GPPRVRW7 0x618 |