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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-27 14:03:57 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-29 18:11:30 +0200 |
| commit | aae53ab76aa818bcf3a7df1e44a80289a2ac6018 (patch) | |
| tree | 44174cdcb4d3a72ee2f50c8950b093a8c33dbdb0 /src/soc/intel | |
| parent | 77c04e95bac0b56ced7deec1f41c0c5b6b9f8ee5 (diff) | |
| download | coreboot-aae53ab76aa818bcf3a7df1e44a80289a2ac6018.tar.xz | |
kbuild: automatically include SOCs
This change switches all SOC vendors and southbridges
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in soc/Makefile.inc or in
soc/<vendor>/Makefile.inc.
This means, vendor and SOC directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.
The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).
Change-Id: Iede26fe184b09c53cec23a545d04953701cbc41d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9799
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/soc/intel/common/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Makefile.inc | 5 |
5 files changed, 17 insertions, 5 deletions
diff --git a/src/soc/intel/Makefile.inc b/src/soc/intel/Makefile.inc deleted file mode 100644 index f86d6cabcb..0000000000 --- a/src/soc/intel/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -subdirs-$(CONFIG_SOC_INTEL_BAYTRAIL) += baytrail -subdirs-$(CONFIG_SOC_INTEL_BROADWELL) += broadwell -subdirs-$(CONFIG_SOC_INTEL_FSP_BAYTRAIL) += fsp_baytrail diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 6d28c78684..78e2da6556 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,8 @@ +ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) + subdirs-y += bootblock subdirs-y += microcode subdirs-y += romstage -subdirs-y += ../common subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm @@ -102,3 +103,5 @@ mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x mrc.bin-type := mrc PHONY += baytrail_add_me + +endif diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index ec6b9ae62a..8b4a0c1d2f 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,8 @@ +ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) + subdirs-y += bootblock subdirs-y += microcode subdirs-y += romstage -subdirs-y += ../common subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm @@ -128,3 +129,5 @@ cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ),$(CONFIG_MRC_BIN_ADDRESS)) mrc.bin-type := mrc + +endif diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index d340308992..46786e2d1a 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -1,6 +1,10 @@ +ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL)$(CONFIG_SOC_INTEL_BROADWELL),y) + ramstage-y += hda_verb.c ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c + +endif diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index 2dfb9cba63..af4871cc91 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -17,6 +17,9 @@ # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # + +ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y) + subdirs-y += microcode subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic @@ -87,3 +90,5 @@ endif endif endif + +endif |