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authorAaron Durbin <adurbin@chromium.org>2014-02-09 16:04:06 -0600
committerMarc Jones <marc.jones@se-eng.com>2015-04-06 19:06:07 +0200
commit2088571f56bc36a6917193706e0f4d8ec1ba5b4b (patch)
tree6beef3b9df74287b597d1e128350f2a4197a2aa3 /src/soc/intel
parent9484f5577e65192808f8752552f7f1de22e48a27 (diff)
downloadcoreboot-2088571f56bc36a6917193706e0f4d8ec1ba5b4b.tar.xz
baytrail: reinitialize spi controller in SMM finalization
On the SMM APM_CNT_FINALIZE step reinitialize the SPI controller so that it can still log events after the SPI controller has been locked down. BUG=chrome-os-partner:24624 BRANCH=baytrail TEST=Built and booted. Events still logged after SPI controller has been locked down. Original-Change-Id: I41a3e12c0398303e74f95eb6df82d5bc4303898b Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/185630 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> (cherry picked from commit 28ffb1a9e761cdfeb173bd533684db1011260e0a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia82753cba9ae4f049de2e81061739efc21d49a1e Reviewed-on: http://review.coreboot.org/9296 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/smihandler.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index a2718e2ddf..06419077f0 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <elog.h>
#include <halt.h>
+#include <spi-generic.h>
#include <baytrail/pci_devs.h>
#include <baytrail/pmc.h>
@@ -232,6 +233,23 @@ static void southbridge_smi_gsmi(void)
*ret = gsmi_exec(sub_command, param);
}
#endif
+
+static void finalize(void)
+{
+ static int finalize_done;
+
+ if (finalize_done) {
+ printk(BIOS_DEBUG, "SMM already finalized.\n");
+ return;
+ }
+ finalize_done = 1;
+
+#if CONFIG_SPI_FLASH_SMM
+ /* Re-init SPI driver to handle locked BAR */
+ spi_init();
+#endif
+}
+
static void southbridge_smi_apmc(void)
{
uint8_t reg8;
@@ -282,6 +300,9 @@ static void southbridge_smi_apmc(void)
southbridge_smi_gsmi();
break;
#endif
+ case APM_CNT_FINALIZE:
+ finalize();
+ break;
}
mainboard_smi_apmc(reg8);