diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-08-11 13:38:26 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-27 05:51:30 +0100 |
| commit | 542307b8153dc773013f8be29251d9b8be8d13b8 (patch) | |
| tree | bb25bb98a3dafdabea06f6613de4e20d767786cd /src/soc/intel | |
| parent | 047f03ab548ba298c01cbdb1fc64cbde8e1122ce (diff) | |
| download | coreboot-542307b8153dc773013f8be29251d9b8be8d13b8.tar.xz | |
broadwell: Add small delay before Flex Ratio reboot
In order to prevent possible TPM lockout due to PLTRST assertion
shortly after powering up add a small delay before the reset.
This will affect cold power up only, reboot/resume/warmboot will
all have the flex ratio locked already so this reset is unneeded.
BUG=chrome-os-partner:29859
BRANCH=None
TEST=build and boot on samus. I tried unsuccessfully to trigger the
TPM lockout, but I was not able to do that consistently without this
patch so it is unknown yet whether this is 100% effective.
Original-Change-Id: Ief8c9261c0268b0f90a3022213ebd2b06633b481
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211893
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 20413f2eafa144f5f381eb6f92d8b959415ca049)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I665e9ed1faa65e88d988660a24bdad40a4c5ab7e
Reviewed-on: http://review.coreboot.org/8957
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/broadwell/bootblock/cpu.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c index e20ced2cf6..796f884f8c 100644 --- a/src/soc/intel/broadwell/bootblock/cpu.c +++ b/src/soc/intel/broadwell/bootblock/cpu.c @@ -57,6 +57,17 @@ static void enable_rom_caching(void) wrmsr(MTRRdefType_MSR, msr); } +static void bootblock_mdelay(int ms) +{ + u32 target = ms * 24 * 1000; + msr_t current; + msr_t start = rdmsr(MSR_COUNTER_24_MHZ); + + do { + current = rdmsr(MSR_COUNTER_24_MHZ); + } while ((current.lo - start.lo) < target); +} + static void set_flex_ratio_to_tdp_nominal(void) { msr_t flex_ratio, msr; @@ -97,6 +108,9 @@ static void set_flex_ratio_to_tdp_nominal(void) /* Set soft reset control to use register value */ RCBA32_OR(SOFT_RESET_CTRL, 1); + /* Delay before reset to avoid potential TPM lockout */ + bootblock_mdelay(30); + /* Issue warm reset, will be "CPU only" due to soft reset data */ outb(0x0, 0xcf9); outb(0x6, 0xcf9); |