diff options
| author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2016-11-23 15:25:19 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-30 16:58:52 +0100 |
| commit | 6467014046811d86a86e4f143476787a4c35a8cc (patch) | |
| tree | 0cb121cc19c25077789a55f7ec1059574ef27e72 /src/soc/intel | |
| parent | 544dac692a3a9a22187316a139e1326c76ce7a6f (diff) | |
| download | coreboot-6467014046811d86a86e4f143476787a4c35a8cc.tar.xz | |
soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0
In FSP 2.0 the UPD to send extra VR Mailbox commands is switched from
SendVrMbxCmd to SendVrMbxCmd1. Use the same in silicon initialization.
Change-Id: I46bd50c9acc0456e2483f20ccb5e9ec2a0de232a
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/17578
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 59115a6b35..f096cf97e7 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -224,7 +224,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) dev = dev_find_slot(0, PCH_DEVFN_SPI); params->ShowSpiController = dev->enabled; - params->SendVrMbxCmd = config->SendVrMbxCmd; + /* + * Send VR specific mailbox commands: + * 000b - no VR specific command sent + * 001b - VR mailbox command specifically for the MPS IMPV8 VR + * will be sent + * 010b - VR specific command sent for PS4 exit issue + * 100b - VR specific command sent for MPS VR decay issue + */ + params->SendVrMbxCmd1 = config->SendVrMbxCmd; soc_irq_settings(params); } |