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| author | Garrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com> | 2018-03-07 16:12:11 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-14 11:17:11 +0000 |
| commit | 6575306663987225080abbe3d5b1e70ba5302e84 (patch) | |
| tree | 427cbed31a5b774780c4ec8cee2b464254f2775f /src/soc/intel | |
| parent | be33a674bb5d7081d77077d9d486bcc45b2624cd (diff) | |
| download | coreboot-6575306663987225080abbe3d5b1e70ba5302e84.tar.xz | |
soc/amd/stoneyridge: Configure FCH for TPM
In preparation for moving AGESA calls out of the bootblock:
* Add sb_tpm_decode to enable FCH decoding of TPM 1.2 regions and Legacy
TPM IO 0x7f-0x7e and 0xef-0xee
* Modify sb_tpm_decode_spi to additionally call sb_tpm_decode.
BUG=b:65442212
BRANCH=master
TEST=abuild, build Gardenia, build and boot Grunt (with other changes
to call code not committed at this time)
Change-Id: I0e2399e113c765393209dd11fd835fc758cf3029
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/25027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions