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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-06-21 12:42:10 +0200 |
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committer | Werner Zeh <werner.zeh@siemens.com> | 2017-06-23 06:52:25 +0000 |
commit | 71dacacb748a73e44ea86ec571cc4ec9ff667d9d (patch) | |
tree | 622e8d649dafc5c625a50b7ff9b87b005eb34270 /src/soc/intel | |
parent | db666a4d6114e30f2377a6cdaeaaf64b1128290a (diff) | |
download | coreboot-71dacacb748a73e44ea86ec571cc4ec9ff667d9d.tar.xz |
siemens/mc_apl1: Enable decoding for COM 3 on LPC
It does not work to enable the LPC range in the function
mainboard_init() because the LPC bus driver closes the range during PCI
enumeration again. For this reason, enabling decoding of the address
range for COM 3 will be done at a later point in time -
mainboard_final().
Change-Id: I452bca4e430b1ea75e4a327591da84500491fe84
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/20295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions