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| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-17 15:01:55 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-19 00:43:39 +0000 |
| commit | 7284efe594114c7bcc933550ade9f728cbf0ca8f (patch) | |
| tree | 6a4e2b1b9592d357478beaef712794ad3ee29ef3 /src/soc/intel | |
| parent | 8f2eadd8d0942a04d7e77d497bd4cf36e16b8bea (diff) | |
| download | coreboot-7284efe594114c7bcc933550ade9f728cbf0ca8f.tar.xz | |
soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check
1. Ensure that port_status read is not all 1s to ensure that read from
mmio address returned valid data.
2. If device connect/disconnect shows that it was a wake source, there
is no need to check for usb activity.
BUG=b:67874513
Change-Id: Id8b4a1fec7bfe530fe435a0f52944b273cdd89ad
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/elog.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 8240457856..2be6b7bc22 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -101,6 +101,10 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, /* Read port status and control register for the port. */ port_status = read32((void *)base); + /* Ensure that the status is not all 1s. */ + if (port_status == 0xffffffff) + continue; + /* * Check if CSC bit is set and port is capable of wake on * connect/disconnect to identify if the port caused wake @@ -110,6 +114,7 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, pch_xhci_wake_capable(port_status)) { elog_add_event_wake(event, i + 1); found = true; + continue; } /* |