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authorAngel Pons <th3fanbus@gmail.com>2021-03-19 15:13:46 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-22 11:26:22 +0000
commit88f94a9635cd64aaf6eeb3ed3991dceabcf6387a (patch)
treefef34198fe0464e964e985d4889f9df747bd66b9 /src/soc/intel
parentd12d24b03930665be9ed9a16875577a770e6d7db (diff)
downloadcoreboot-88f94a9635cd64aaf6eeb3ed3991dceabcf6387a.tar.xz
lynxpoint/broadwell: Rename LP GPIO config global
Do not use the same name as the non-LP GPIO config. This allows checking at build-time that a mainboard uses the correct GPIO config format. Without this commit, there are no build-time errors when using the wrong format of GPIO config, but there would be undefined behavior at runtime. Tested by trying to build asrock/b85m_pro4 and hp/folio_9480m after toggling the `INTEL_LYNXPOINT_LP` Kconfig option (and trimming down the USB config arrays for asrock/b85m_pro4). In both cases, building failed because the necessary GPIO config global is not defined, as expected. Change-Id: Ib06507ef8179da22bdb27593daf972e788051f3a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51661 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c
index 82ee73d825..0ba62589eb 100644
--- a/src/soc/intel/broadwell/romstage.c
+++ b/src/soc/intel/broadwell/romstage.c
@@ -52,7 +52,7 @@ void mainboard_romstage_entry(void)
set_max_freq();
/* Initialize GPIOs */
- setup_pch_lp_gpios(mainboard_gpio_map);
+ setup_pch_lp_gpios(mainboard_lp_gpio_map);
mainboard_fill_pei_data(&pei_data);
mainboard_fill_spd_data(&pei_data);