diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-23 19:54:12 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-24 16:12:44 +0000 |
| commit | 9796f60c62f57ac512f225809c10b5b09ef80f5a (patch) | |
| tree | 5d6c3e1d933782bbb03af4ac7a21579f722b5327 /src/soc/intel | |
| parent | a40032780fe4da7d95b203fb3d05a25183590952 (diff) | |
| download | coreboot-9796f60c62f57ac512f225809c10b5b09ef80f5a.tar.xz | |
coreboot: move TS_END_ROMSTAGE to one spot
While the romstage code flow is not consistent across all
mainboards/chipsets there is only one way of running ramstage
from romstage -- run_ramstage(). Move the
timestamp_add_now(TS_END_ROMSTAGE) to be within run_ramstage().
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built and booted glados. TS_END_ROMSTAGE still present in
timestamp table.
Change-Id: I4b584e274ce2107e83ca6425491fdc71a138e82c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11700
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/romstage/romstage.c | 2 |
4 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 7bd2663b25..c7f66bb4a2 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -250,8 +250,6 @@ void romstage_common(struct romstage_params *params) void asmlinkage romstage_after_car(void) { - timestamp_add_now(TS_END_ROMSTAGE); - /* Load the ramstage. */ copy_and_run(); while (1); diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 884c274316..5b6d0b30f8 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -132,8 +132,6 @@ void romstage_common(struct romstage_params *params) void asmlinkage romstage_after_car(void) { - timestamp_add_now(TS_END_ROMSTAGE); - /* Load the ramstage. */ copy_and_run(); while (1); diff --git a/src/soc/intel/common/romstage.c b/src/soc/intel/common/romstage.c index ee9c9751a8..0d5e85fa67 100644 --- a/src/soc/intel/common/romstage.c +++ b/src/soc/intel/common/romstage.c @@ -207,8 +207,6 @@ asmlinkage void romstage_after_car(void *chipset_context) soc_after_temp_ram_exit(); soc_display_mtrrs(); - timestamp_add_now(TS_END_ROMSTAGE); - /* Load the ramstage. */ copy_and_run(); die("ERROR - Failed to load ramstage!"); diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index c40f1635da..b5384facb8 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -267,8 +267,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { else printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - timestamp_add_now(TS_END_ROMSTAGE); - post_code(0x4f); /* Load the ramstage. */ |