diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-04-13 11:51:30 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-13 22:16:21 +0200 |
| commit | a0729d9a561c335b9f7b179602da1c9ed8b34ba5 (patch) | |
| tree | 39fa01c648983b4f11f100e73534a5ce2f5717af /src/soc/intel | |
| parent | 5ad939679f40f77d7a8dec8541ab71143b4f8267 (diff) | |
| download | coreboot-a0729d9a561c335b9f7b179602da1c9ed8b34ba5.tar.xz | |
soc/intel/apollolake: Change IOSF_BASE_ADDRESS to PCR_BASE_ADDRESS
With recent change to use common block PCR (ccd8700c),
IOSF_BASE_ADDRESS was renamed to PCR_BASE_ADDRESS. However, SD card
change (99ce8a9b) was not rebased on top of it, so IOSF_BASE_ADDRESS
slipped into the tree. Fix this by replacing all occurrences of
IOSF_BASE_ADDRESS by PCR_BASE_ADDRESS.
Change-Id: I40eb07be306035c940fc960896e0807d6c73bafa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19277
Tested-by: build bot (Jenkins)
Reviewed-by: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/gpiolib.asl | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl index 0acfb67016..a4d4b00cf6 100644 --- a/src/soc/intel/apollolake/acpi/gpiolib.asl +++ b/src/soc/intel/apollolake/acpi/gpiolib.asl @@ -71,7 +71,7 @@ Scope (\_SB) /* Arg0 - GPIO portid */ /* Arg1 - GPIO pad offset relative to the community */ Store (0, Local1) - Or( Or (ShiftLeft (Arg0, 16), CONFIG_IOSF_BASE_ADDRESS), + Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS), Local1, Local1) Or( Add (PAD_CFG_BASE, Multiply (Arg1, 8)), Local1, Local1) Return (Local1) @@ -93,7 +93,7 @@ Scope (\_SB) Store (CHSA (Arg1), Local1) OperationRegion (SHO0, SystemMemory, Or ( Or - (CONFIG_IOSF_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) + (CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) Field (SHO0, AnyAcc, NoLock, Preserve) { TEMP, 32 } @@ -109,7 +109,7 @@ Scope (\_SB) Store (CHSA (Arg1), Local1) OperationRegion (SHO0, SystemMemory, Or ( Or - (CONFIG_IOSF_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) + (CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) Field (SHO0, AnyAcc, NoLock, Preserve) { TEMP, 32 } |