diff options
| author | Tim Chu <Tim.Chu@quantatw.com> | 2020-07-09 18:30:56 -0700 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-07-16 13:08:06 +0000 |
| commit | adb6922a6d78447059f90eb739a1bbf0326a9377 (patch) | |
| tree | 813de5452c0041855bc740fa9b574c5be2edcd2b /src/soc/intel | |
| parent | a5ca4a0c75237093f1a4d90f30c0c932e5fcd05d (diff) | |
| download | coreboot-adb6922a6d78447059f90eb739a1bbf0326a9377.tar.xz | |
soc/intel/common/block/pmc: Select PMC on mainboard basis
Currently the common soc code automatically selects
POWER_STATE_DEFAULT_ON_AFTER_FAILURE which making other mainboard
options unselectable.
However, there're some cases that power state should change to different
states after reapplying power.
Make POWER_STATE_DEFAULT_ON_AFTER_FAILURE default y but do not select it
in soc code so that we can disable it and select other options in the
mainboard code.
Tested on OCP Delta Lake.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: Ifa853d81ee9477d2440ceaa67b2bd6b863ee52c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/pmc/Kconfig | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index c2757e6e72..3aa0da8b1e 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -4,11 +4,17 @@ config SOC_INTEL_COMMON_BLOCK_PMC bool select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select POWER_STATE_DEFAULT_ON_AFTER_FAILURE help Intel Processor common code for Power Management controller(PMC) subsystem +if SOC_INTEL_COMMON_BLOCK_PMC + +config POWER_STATE_DEFAULT_ON_AFTER_FAILURE + default y + +endif # SOC_INTEL_COMMON_BLOCK_PMC + config PMC_INVALID_READ_AFTER_WRITE bool default n |