summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2017-06-12 12:48:38 -0500
committerAaron Durbin <adurbin@chromium.org>2017-06-13 20:03:16 +0200
commitd9762f70acc1cc2db5b3905756f5f5a995b9a21a (patch)
treebbc2f43c641ebd839358217ffdac963b9923cc81 /src/soc/intel
parente1058c7c996fa70e6a82d5709cba6f2b836f0e18 (diff)
downloadcoreboot-d9762f70acc1cc2db5b3905756f5f5a995b9a21a.tar.xz
cpu/x86/mtrr: fail early if solution exceeds available MTRRs
If an MTRR solution exceeds the number of available MTRRs don't attempt to commit the result. It will just GP fault with the MSR write to an invalid MSR address. Change-Id: I5c4912d5244526544c299c3953bca1bf884b34d5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/20163 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions