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authorSubrata Banik <subrata.banik@intel.com>2020-01-22 15:48:52 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-01-24 22:55:26 +0000
commit21d79ad0d5d9b94e0619be6661e71ab726f289ec (patch)
tree55fc526410844c17c650659a07e6cf3d8939e299 /src/soc/intel
parent8f18eb510cf1b4723ffa0c5e51c14fe9f8ab9790 (diff)
downloadcoreboot-21d79ad0d5d9b94e0619be6661e71ab726f289ec.tar.xz
soc/intel/skylake: Move pci_irqs.asl from SA to PCH
SoC handles PCI IRQs programming inside PCH related ASL. TEST=Build and boot EVE and Soraka to OS. Change-Id: If95101193fa1b528dc64f57c0fc12f13f16d82b4 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/skylake/acpi/pch.asl3
-rw-r--r--src/soc/intel/skylake/acpi/systemagent.asl3
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl
index 0aba2e7542..ce1619aaea 100644
--- a/src/soc/intel/skylake/acpi/pch.asl
+++ b/src/soc/intel/skylake/acpi/pch.asl
@@ -23,6 +23,9 @@
#include <soc/gpe.h>
#include <soc/pcr_ids.h>
+/* PCI IRQ assignment */
+#include "pci_irqs.asl"
+
/* GPIO Controller */
#include "gpio.asl"
diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl
index 89380aa194..0857495304 100644
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -336,6 +336,3 @@ Device (PDRC)
Return (BUF0)
}
}
-
-/* PCI IRQ assignment */
-#include "pci_irqs.asl"