diff options
| author | Marc Jones <marcj303@gmail.com> | 2018-02-08 15:41:54 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-02-26 18:18:21 +0000 |
| commit | 5fd1d5ad1258407ade7fe8f72672c878bdfd8f05 (patch) | |
| tree | ec49b3ebdf323eb698a9faf57034c88f6d599738 /src/soc/intel | |
| parent | 932b5bdb6d0fe99391952e4ed062cb4f1ed467af (diff) | |
| download | coreboot-5fd1d5ad1258407ade7fe8f72672c878bdfd8f05.tar.xz | |
soc/amd/stoneyridge: Refactor northbridge resource allocator
The resource allocator was overly complicated due to porting
from a multi-node resource allocator. It had some assumptions
about the UMA memory and where it would be located. The
refactored allocations account for UMA being reserved above 4GiB.
TEST=Check CBMEM table has correct RAM regions.
Change-Id: I722ded9fb877ec756c3af11fcb5fea587ac0ba8e
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/23819
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions