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author | Aaron Durbin <adurbin@chromium.org> | 2016-04-29 12:10:28 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-02 20:04:56 +0200 |
commit | 800b0173c98101ee6ad2c7eaf1951a435c819fd9 (patch) | |
tree | 36c1b3b571030a50c543764f6610115d851788a0 /src/soc/intel | |
parent | a6e9051bc6843bb8f42df9c29cd254914ece93b4 (diff) | |
download | coreboot-800b0173c98101ee6ad2c7eaf1951a435c819fd9.tar.xz |
arch/x86/asembly_entry: reorder conditional stage entry macros
The path that just clears CAR_GLOBAL variables and jumps
to the stage entry point needs another condition for
separate verstage just after bootblock. However, the
current conditional is a negative conditional so
swap the logic around to make it easier to extend.
Change-Id: Iab6682498054715a6eaa0476390da6355238b9bc
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14547
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions