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authorFurquan Shaikh <furquan@chromium.org>2017-05-06 12:40:15 -0700
committerDuncan Laurie <dlaurie@chromium.org>2017-05-08 19:14:08 +0200
commita585358f9bb9ac417af1b8b03d08b573ca692d6a (patch)
treeccbdacbea7f033ce27326b1f4262797242f59fcb /src/soc/intel
parent16bc9bab2ab3b248f44bdf721ec83cdc21bcc32e (diff)
downloadcoreboot-a585358f9bb9ac417af1b8b03d08b573ca692d6a.tar.xz
soc/intel/skylake: Enable PARALLEL_MP_AP_WORK
With change a4b11e5c90 (soc/intel/skylake: Perform CPU MP Init before FSP-S Init) to perform CPU MP init before FSP-S init, MTRR programming was moved to be performed after CPU init is done. However, in order to allow callbacks after MP init, PARALLEL_MP_AP_WORK needs to be enabled. Since this option was not selected, MTRR programming always failed in ramstage for Skylake / Kaby Lake mainboards. BUG=b:36656098 TEST=Verified 2500+ cycles of suspend resume on poppy. Change-Id: I22a8f6ac90ba35075ff97dd57bab66c129f3e771 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/skylake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 515de91344..fba6f7f0b9 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS
select NO_FIXED_XIP_ROM_SIZE
select MRC_SETTINGS_PROTECT
select PARALLEL_MP
+ select PARALLEL_MP_AP_WORK
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM