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authorSubrata Banik <subrata.banik@intel.com>2017-09-05 18:44:15 +0530
committerSubrata Banik <subrata.banik@intel.com>2017-09-06 02:34:38 +0000
commitb92ad0b0775b939240980bb4a1c60521efb7d008 (patch)
tree77ce1882372add30b270cd5c5f031acc0eb5dde5 /src/soc/intel
parent768843e9e318675e2a0a89a2a4b1bf7b9a876a43 (diff)
downloadcoreboot-b92ad0b0775b939240980bb4a1c60521efb7d008.tar.xz
soc/intel/{cannonlake,skylake}: Fix null pointer dereference in klocwork
This patch fixes klocwork bug due to recent memmap.c implementation where “Pointer 'dev' returned from call to function 'dev_find_slot' at line 144 may be NULL.” Change-Id: I4c74ca410d1a0ba48634ec9928a0d9d1cc20e27a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21404 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/cannonlake/memmap.c2
-rw-r--r--src/soc/intel/skylake/memmap.c3
2 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c
index 8f842c0c5c..29f25f2693 100644
--- a/src/soc/intel/cannonlake/memmap.c
+++ b/src/soc/intel/cannonlake/memmap.c
@@ -91,6 +91,8 @@ static uintptr_t calculate_dram_base(void)
size_t imr_size;
dev = dev_find_slot(0, PCI_DEVFN(SA_DEV_SLOT_IGD, 0));
+ if (!dev)
+ die("ERROR - device not found!");
/* Read TOLUD from Host Bridge offset */
dram_base = sa_get_tolud_base();
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index 229afa7b43..6c640732cc 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -142,6 +142,8 @@ static u32 calculate_dram_base(void)
size_t prmrr_size;
dev = dev_find_slot(0, PCI_DEVFN(SA_DEV_SLOT_IGD, 0));
+ if (!dev)
+ die("ERROR - device not found!");
/* Read TOLUD from Host Bridge offset */
dram_base = sa_get_tolud_base();
@@ -160,7 +162,6 @@ static u32 calculate_dram_base(void)
if (IS_ENABLED(CONFIG_SA_ENABLE_DPR))
dram_base -= sa_get_dpr_size();
- dev = dev_find_slot(0, PCI_DEVFN(SA_DEV_SLOT_ROOT, 0));
config = dev->chip_info;
if (IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1))
prmrr_size = 1*MiB;