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authorHannah Williams <hannah.williams@intel.com>2016-01-19 11:58:58 -0800
committerMartin Roth <martinroth@google.com>2016-01-27 23:59:03 +0100
commitfc5489fc5e620adf3ec9f3d692444aa4c2b3801e (patch)
tree40a61e12407a593abc8ac47328d43a1f6e6a0169 /src/soc/intel
parentd4b26b29233beea162dd2756cd89bf015411ed08 (diff)
downloadcoreboot-fc5489fc5e620adf3ec9f3d692444aa4c2b3801e.tar.xz
soc/braswell: Add macro NATIVE_INT_PU20K
Change-Id: I04db02d37a76f0643a73ae4d67b839e5cd61f7e3 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/13054 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/braswell/include/soc/gpio.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 11110c94f1..4ab6592498 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -285,6 +285,11 @@
| PAD_GPIOFG_HI_Z | PAD_MODE_SELECTION(mode),\
.pad_conf1 = PAD_CONFIG1_DEFAULT0 }
+#define NATIVE_INT_PU20K(mode, int_sel) {\
+ .pad_conf0 = PAD_PULL_UP_20K | PAD_INT_SEL(int_sel) | PAD_GPIO_DISABLE \
+ | PAD_GPIOFG_HI_Z | PAD_MODE_SELECTION(mode),\
+ .pad_conf1 = PAD_CONFIG1_DEFAULT0 }
+
#define SPEAKER \
{ .pad_conf0 = PAD_CONFIG0_DEFAULT0, \
.pad_conf1 = PAD_CONFIG1_DEFAULT0 }