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authorPhilipp Deppenwiese <zaolin@das-labor.org>2018-07-28 23:34:20 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-07-29 12:29:11 +0000
commit66ce18c508ffff42d290d4316b72d5fd153f8260 (patch)
tree7ed382b9b5739772dbd7d785e6319cd1e1c2ec05 /src/soc/intel
parent708cf4b34e22408a673727ba04ff1264758d06c9 (diff)
downloadcoreboot-66ce18c508ffff42d290d4316b72d5fd153f8260.tar.xz
soc/intel: Remove legacy static TPM asl code
Since the TPM software stack refactoring static TPM ACPI code isn't needed anymore. Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/27715 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/acpi/lpc.asl23
-rw-r--r--src/soc/intel/braswell/acpi/lpc.asl23
-rw-r--r--src/soc/intel/denverton_ns/acpi/lpc.asl24
-rw-r--r--src/soc/intel/fsp_baytrail/acpi/lpc.asl23
4 files changed, 0 insertions, 93 deletions
diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl
index 17d6f43574..00aac51e23 100644
--- a/src/soc/intel/baytrail/acpi/lpc.asl
+++ b/src/soc/intel/baytrail/acpi/lpc.asl
@@ -135,27 +135,4 @@ Device (LPCB)
// Include mainboard's superio.asl file.
#include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- })
- }
-#endif
}
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index eb4a16a88f..0a8b8bc081 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -137,27 +137,4 @@ Device (LPCB)
/* Include mainboard's superio.asl file. */
#include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
- Device (TPM) /* Trusted Platform Module */
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- })
- }
-#endif
}
diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl
index 3167c183d8..cc36451de2 100644
--- a/src/soc/intel/denverton_ns/acpi/lpc.asl
+++ b/src/soc/intel/denverton_ns/acpi/lpc.asl
@@ -205,28 +205,4 @@ Device (LPCB)
Return(BUF0)
}
}
-
-#ifdef ENABLE_TPM
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- IRQ (Edge, Activehigh, Exclusive) { 6 }
- })
- }
-#endif
}
diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
index 17d6f43574..00aac51e23 100644
--- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl
+++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
@@ -135,27 +135,4 @@ Device (LPCB)
// Include mainboard's superio.asl file.
#include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- })
- }
-#endif
}