diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-10-11 12:39:48 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-12 23:36:10 +0100 |
| commit | 82e7d956efc6c860dbec2c6a66857a43e5c14504 (patch) | |
| tree | 6a29a5d67c147c7aeeebb0d685cfeabda15a8361 /src/soc/intel | |
| parent | b3b008a9b6f3d50901e7b7cb68a8ad210dd74100 (diff) | |
| download | coreboot-82e7d956efc6c860dbec2c6a66857a43e5c14504.tar.xz | |
baytrail: gpio: add configs for PU/PD functional pins
Pull-ups and pull-downs can be active on functional pins. Add configs
for these options so they can be specified on board GPIO maps.
TEST=Manual on bayleybay. Verify that platform boots to payload load.
BUG=chrome-os-partner:22863
Change-Id: Ie4f77d8ce812f086cc8fe5a6bfcac59669f56f92
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172766
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5209
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/baytrail/baytrail/gpio.h | 62 |
1 files changed, 25 insertions, 37 deletions
diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h index f62f5c80ad..a180ba73b7 100644 --- a/src/soc/intel/baytrail/baytrail/gpio.h +++ b/src/soc/intel/baytrail/baytrail/gpio.h @@ -187,47 +187,35 @@ .io_sel = GPIO_DIR_OUTPUT, \ .gp_lvl = GPIO_LEVEL_HIGH } -#define GPIO_FUNC0 \ +/* Define no-pull / PU / PD configs for each functional config option */ +#define _GPIO_FUNC(_func, _pu, _str) \ { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC0 | PAD_CONFIG0_DEFAULT, \ + .pad_conf0 = PAD_FUNC##_func | PAD_PU_##_pu | PAD_PU_##_str | \ + PAD_CONFIG0_DEFAULT, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ .pad_val = PAD_VAL_DEFAULT } -#define GPIO_FUNC1 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC1 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } - -#define GPIO_FUNC2 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC2 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } - -#define GPIO_FUNC3 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC3 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } - -#define GPIO_FUNC4 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC4 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } - -#define GPIO_FUNC5 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC5 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } - -#define GPIO_FUNC6 \ - { .use_sel = GPIO_USE_PAD, \ - .pad_conf0 = PAD_FUNC6 | PAD_CONFIG0_DEFAULT, \ - .pad_conf1 = PAD_CONFIG1_DEFAULT, \ - .pad_val = PAD_VAL_DEFAULT } +#define GPIO_FUNC0 _GPIO_FUNC(0, DISABLE, 10K) +#define GPIO_FUNC0_PU_10K _GPIO_FUNC(0, UP, 10K) +#define GPIO_FUNC0_PD_10K _GPIO_FUNC(0, DOWN, 10K) +#define GPIO_FUNC1 _GPIO_FUNC(1, DISABLE, 10K) +#define GPIO_FUNC1_PU_10K _GPIO_FUNC(1, UP, 10K) +#define GPIO_FUNC1_PD_10K _GPIO_FUNC(1, DOWN, 10K) +#define GPIO_FUNC2 _GPIO_FUNC(2, DISABLE, 10K) +#define GPIO_FUNC2_PU_10K _GPIO_FUNC(2, UP, 10K) +#define GPIO_FUNC2_PD_10K _GPIO_FUNC(2, DOWN, 10K) +#define GPIO_FUNC3 _GPIO_FUNC(3, DISABLE, 10K) +#define GPIO_FUNC3_PU_10K _GPIO_FUNC(3, UP, 10K) +#define GPIO_FUNC3_PD_10K _GPIO_FUNC(3, DOWN, 10K) +#define GPIO_FUNC4 _GPIO_FUNC(4, DISABLE, 10K) +#define GPIO_FUNC4_PU_10K _GPIO_FUNC(4, UP, 10K) +#define GPIO_FUNC4_PD_10K _GPIO_FUNC(4, DOWN, 10K) +#define GPIO_FUNC5 _GPIO_FUNC(5, DISABLE, 10K) +#define GPIO_FUNC5_PU_10K _GPIO_FUNC(5, UP, 10K) +#define GPIO_FUNC5_PD_10K _GPIO_FUNC(5, DOWN, 10K) +#define GPIO_FUNC6 _GPIO_FUNC(6, DISABLE, 10K) +#define GPIO_FUNC6_PU_10K _GPIO_FUNC(6, UP, 10K) +#define GPIO_FUNC6_PD_10K _GPIO_FUNC(6, DOWN, 10K) /* End marker */ #define GPIO_LIST_END 0xffffffff |