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authorPatrick Rudolph <siro@das-labor.org>2017-06-15 09:18:01 +0200
committerMatt DeVillier <matt.devillier@gmail.com>2017-09-30 01:24:47 +0000
commitc060fb5aace8b3445bb79bbaf74145a022022e57 (patch)
treebb7a3aefd160e9de88ef76df0d6b08690fd4f2d8 /src/soc/intel
parent7c60498de703881b689e06fdd1a14f741a93d5c1 (diff)
downloadcoreboot-c060fb5aace8b3445bb79bbaf74145a022022e57.tar.xz
soc/intel/braswell/acpi: Clean OpRegion up
Reorder code and put platform specific bits into update_igd_opregion. Get rid of get_fsp_vbt and init_igd_opregion. Write GMA opregion in case a VBT was provided, even when no FSP_GOP is to be run. Use SOC_INTEL_COMMON_GFX_OPREGION to reduce code duplication. Change-Id: Ibabeb05a9d3d776b73f6885dcca846d5001116e7 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/20221 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/braswell/Kconfig1
-rw-r--r--src/soc/intel/braswell/acpi.c116
-rw-r--r--src/soc/intel/braswell/include/soc/acpi.h3
3 files changed, 44 insertions, 76 deletions
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 3decbc73b9..dc2f40de1d 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SPI_CONSOLE_SUPPORT
select HAVE_FSP_GOP
select GENERIC_GPIO_LIB
+ select SOC_INTEL_COMMON_GFX_OPREGION
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 7a518167b3..ada274144c 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -31,7 +31,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <ec/google/chromeec/ec.h>
-#include <fsp/gop.h>
+#include <soc/intel/common/opregion.h>
#include <rules.h>
#include <soc/acpi.h>
#include <soc/gfx.h>
@@ -473,6 +473,46 @@ unsigned long acpi_madt_irq_overrides(unsigned long current)
return current;
}
+/* Initialize IGD OpRegion, called from ACPI code */
+static int update_igd_opregion(igd_opregion_t *opregion)
+{
+ u16 reg16;
+ struct device *igd;
+
+ /* TODO Initialize Mailbox 1 */
+
+ /* TODO Initialize Mailbox 3 */
+ opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
+ opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
+ opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */
+ opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS;
+ opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000;
+ opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19;
+ opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433;
+ opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c;
+ opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866;
+ opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f;
+ opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99;
+ opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2;
+ opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
+ opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
+ opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
+
+ /*
+ * TODO This needs to happen in S3 resume, too.
+ * Maybe it should move to the finalize handler
+ */
+ igd = dev_find_slot(0, PCI_DEVFN(GFX_DEV, GFX_FUNC));
+
+ pci_write_config32(igd, ASLS, (u32)opregion);
+ reg16 = pci_read_config16(igd, SWSCI);
+ reg16 &= ~(1 << 0);
+ reg16 |= (1 << 15);
+ pci_write_config16(igd, SWSCI, reg16);
+
+ return 0;
+}
+
unsigned long southcluster_write_acpi_tables(device_t device,
unsigned long current,
struct acpi_rsdp *rsdp)
@@ -482,12 +522,13 @@ unsigned long southcluster_write_acpi_tables(device_t device,
current = acpi_write_hpet(device, current, rsdp);
current = acpi_align_current(current);
- if (IS_ENABLED(CONFIG_RUN_FSP_GOP)) {
+ if (IS_ENABLED(CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE)) {
igd_opregion_t *opregion;
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
init_igd_opregion(opregion);
+ update_igd_opregion(opregion);
current += sizeof(igd_opregion_t);
current = acpi_align_current(current);
}
@@ -543,74 +584,3 @@ void southcluster_inject_dsdt(device_t device)
__attribute__((weak)) void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
{
}
-
-/* Reading VBT table from flash */
-static void get_fsp_vbt(igd_opregion_t *opregion)
-{
- const optionrom_vbt_t *vbt;
- uint32_t vbt_len;
-
- vbt = fsp_get_vbt(&vbt_len);
- if (!vbt)
- die("vbt data not found");
- memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, 4);
- memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size <
- sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size :
- sizeof(opregion->vbt.gvd1));
-}
-
-/* Initialize IGD OpRegion, called from ACPI code */
-int init_igd_opregion(igd_opregion_t *opregion)
-{
- device_t igd;
- u16 reg16;
-
- memset(opregion, 0, sizeof(igd_opregion_t));
-
- /* FIXME if IGD is disabled, we should exit here. */
-
- memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
- sizeof(IGD_OPREGION_SIGNATURE));
-
- /* 8kb */
- opregion->header.size = sizeof(igd_opregion_t) / 1024;
- opregion->header.version = IGD_OPREGION_VERSION;
-
- /* FIXME We just assume we're mobile for now */
- opregion->header.mailboxes = MAILBOXES_MOBILE;
-
- /* TODO Initialize Mailbox 1 */
-
- /* TODO Initialize Mailbox 3 */
- opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
- opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
- opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */
- opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS;
- opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000;
- opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19;
- opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433;
- opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c;
- opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866;
- opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f;
- opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99;
- opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2;
- opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
- opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
- opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
-
- get_fsp_vbt(opregion);
-
- /*
- * TODO This needs to happen in S3 resume, too.
- * Maybe it should move to the finalize handler
- */
- igd = dev_find_slot(0, PCI_DEVFN(GFX_DEV, GFX_FUNC));
-
- pci_write_config32(igd, ASLS, (u32)opregion);
- reg16 = pci_read_config16(igd, SWSCI);
- reg16 &= ~(1 << 0);
- reg16 |= (1 << 15);
- pci_write_config16(igd, SWSCI, reg16);
-
- return 0;
-}
diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h
index 50d9577b16..7f577273a1 100644
--- a/src/soc/intel/braswell/include/soc/acpi.h
+++ b/src/soc/intel/braswell/include/soc/acpi.h
@@ -20,9 +20,6 @@
#include <arch/acpi.h>
#include <soc/nvs.h>
-#include <fsp/gma.h>
-int init_igd_opregion(igd_opregion_t *igd_opregion);
-
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void acpi_fill_in_fadt(acpi_fadt_t *fadt);
unsigned long acpi_madt_irq_overrides(unsigned long current);