diff options
author | Andrey Petrov <andrey.petrov@intel.com> | 2016-06-17 15:30:13 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-06-24 20:30:45 +0200 |
commit | 0f593c22a8a88068ffdf73f87ee9ce98c343a977 (patch) | |
tree | 37baaf714d2dee0fdeaa5bfb5159b76dc09b85d5 /src/soc/intel | |
parent | 43e1bfd13cd067c992009b51cf130c06921092cd (diff) | |
download | coreboot-0f593c22a8a88068ffdf73f87ee9ce98c343a977.tar.xz |
soc/intel/apollolake: Add utility functions for global reset
Apollolake defines Global Reset where Host, TXE and PMC are reset.
During boot we may need to trigger a global reset as part of platform
initialization (or for error handling). Add functions to trigger
global reset, enable/disable it and lock global reset bit.
BUG=chrome-os-partner:54149
BRANCH=none
TEST=none
Change-Id: I84296cd1560a0740f33ef6b488f15f99d397998d
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15198
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 3 | ||||
-rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 7 | ||||
-rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 31 | ||||
-rw-r--r-- | src/soc/intel/apollolake/reset.c | 23 |
4 files changed, 64 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 4ad6f0f738..d67a6bd833 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -29,6 +29,7 @@ romstage-y += meminit.c romstage-y += mmap_boot.c romstage-y += tsc_freq.c romstage-y += pmutil.c +romstage-y += reset.c romstage-y += spi.c smm-y += mmap_boot.c @@ -54,6 +55,7 @@ ramstage-y += spi.c ramstage-y += tsc_freq.c ramstage-y += pmutil.c ramstage-y += pmc.c +ramstage-y += reset.c ramstage-y += smi.c ramstage-y += spi.c @@ -70,6 +72,7 @@ verstage-y += mmap_boot.c verstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c verstage-y += tsc_freq.c verstage-y += pmutil.c +verstage-y += reset.c verstage-y += spi.c CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 856872ed97..8838d1c9f0 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -128,6 +128,10 @@ #define GEN_PMCON2 0x1024 # define RPS (1 << 2) #define GEN_PMCON3 0x1028 +#define ETR 0x1048 +# define CF9_LOCK (1 << 31) +# define CF9_GLB_RST (1 << 20) + /* Generic sleep state types */ #define SLEEP_STATE_S0 0 @@ -168,4 +172,7 @@ void enable_gpe(uint32_t mask); void disable_gpe(uint32_t mask); void disable_all_gpe(void); +void global_reset_enable(bool enable); +void global_reset_lock(void); + #endif diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 6e47911fcd..84ac4b77a1 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -365,3 +365,34 @@ int vboot_platform_is_resuming(void) typ = (inl(ACPI_PMIO_BASE + PM1_CNT) & SLP_TYP) >> SLP_TYP_SHIFT; return typ == SLP_TYP_S3; } + +/* + * If possible, lock 0xcf9. Once the register is locked, it can't be changed. + * This lock is reset on cold boot, hard reset, soft reset and Sx. + */ +void global_reset_lock(void) +{ + uintptr_t etr = read_pmc_mmio_bar() + ETR; + uint32_t reg; + + reg = read32((void *)etr); + if (reg & CF9_LOCK) + return; + reg |= CF9_LOCK; + write32((void *)etr, reg); +} + +/* + * Enable or disable global reset. If global reset is enabled, hard reset and + * soft reset will trigger global reset, where both host and TXE are reset. + * This is cleared on cold boot, hard reset, soft reset and Sx. + */ +void global_reset_enable(bool enable) +{ + uintptr_t etr = read_pmc_mmio_bar() + ETR; + uint32_t reg; + + reg = read32((void *)etr); + reg = enable ? reg | CF9_GLB_RST : reg & ~CF9_GLB_RST; + write32((void *)etr, reg); +} diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c new file mode 100644 index 0000000000..644d88d882 --- /dev/null +++ b/src/soc/intel/apollolake/reset.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <reset.h> +#include <soc/pm.h> + +void global_reset(void) +{ + global_reset_enable(1); + hard_reset(); +} |