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| author | Lance Zhao <lijian.zhao@intel.com> | 2015-11-16 18:13:23 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-11 16:28:50 +0200 |
| commit | 2c34e3155c37a5bb2cca28334ca35eac98544c22 (patch) | |
| tree | 35a13fa29d6af688df146768219d6761d9a021bd /src/soc/intel | |
| parent | 7fbe6ae900f715c7346187721438b387613ef6f4 (diff) | |
| download | coreboot-2c34e3155c37a5bb2cca28334ca35eac98544c22.tar.xz | |
soc/apollolake/acpi: Fill ACPI MCFG table
ACPI MCFG table is required for OS to support Enhanced
Configuration Space Access.Apollolake will only support
1 PCI Segment Group, so all the pci bus number from 0
to 0xff will belong to that group.
Change-Id: I3a680eb9c83290cd531159d7e796382a132cd283
Signed-off-by: Lance Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/13375
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/acpi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 5fd2b7493a..3677477f40 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -18,6 +18,10 @@ unsigned long acpi_fill_mcfg(unsigned long current) { + /* PCI Segment Group 0, Start Bus Number 0, End Bus Number is 255 */ + current += acpi_create_mcfg_mmconfig((void *) current, + CONFIG_MMCONF_BASE_ADDRESS, 0, 0, + 255); return current; } |