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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2016-06-04 00:52:21 +0200
committerAaron Durbin <adurbin@chromium.org>2016-06-10 03:43:14 +0200
commit3790a420036874f3d8e01f4f4cf1340f657242d2 (patch)
treec0e5005e9fd1f3e2f4a9af64c109521bc705bfac /src/soc/intel
parent47d4f7cec3bd6a4fb632db5901fff4676e562114 (diff)
downloadcoreboot-3790a420036874f3d8e01f4f4cf1340f657242d2.tar.xz
Revert "soc/intel/apollolake: Do not use StackBase FSP-M parameter"
This reverts commit 5ede3d8ccebde6f26c6b24f6458e57d99d5f3957. No longer needed due to FSP being updated, with the 139_40 release, to accept StackBase field BUG=chrome-os-partner:52784 BRANCH=none TEST=built and booted with FSP 139_40 Change-Id: Ic832d8dc4ca87631f5fef80d4d41558d9a72630a Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/15068 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/romstage.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index dec5a18601..756e27534a 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -235,13 +235,9 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
* requests.
* TODO: add checks to avoid overlap/conflict of CAR usage.
*/
-
- /* fsp does not work with StackBase modified, so use default */
-#if 0
- /* FIXME: remove this once FSP is fixed */
mupd->FspmArchUpd.StackBase = _car_region_end -
mupd->FspmArchUpd.StackSize;
-#endif
+
arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {