diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2017-03-14 16:37:55 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2017-03-15 19:45:42 +0100 |
| commit | 4fa8a6f4fefe04eaa1579c03d36abf0fbc9a27f7 (patch) | |
| tree | 41aecf71100340686b430faa32883f0d0175ccd7 /src/soc/intel | |
| parent | 2661a9f517dd2abe72728f21feaacca99b5089cc (diff) | |
| download | coreboot-4fa8a6f4fefe04eaa1579c03d36abf0fbc9a27f7.tar.xz | |
intel/skylake: Fix bug in VR configuration with FSP 2.0
With the move to FSP 2.0 the number of VR types supported was
reduced to 4, and the VR_RING type is no longer present.
This means all existing boards using FSP 2.0 are incorrectly
passing VR configuration into FSP as the values corresponding to
"GT Sliced" and "GT Unsliced" have changed.
Fix this by updating the skylake SOC VR handling to account for
changes in the FSP configuration and no longer provide VR_RING
type when using FSP 2.0.
BUG=b:36228330
BRANCH=none
TEST=manual: build and boot on Eve
Change-Id: I59eea9fba006a4c235d7b42d07fdc6e4f44f7351
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18818
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/vr_config.h | 16 | ||||
| -rw-r--r-- | src/soc/intel/skylake/vr_config.c | 2 |
2 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/include/soc/vr_config.h b/src/soc/intel/skylake/include/soc/vr_config.h index 1c19b8870e..27d84b2629 100644 --- a/src/soc/intel/skylake/include/soc/vr_config.h +++ b/src/soc/intel/skylake/include/soc/vr_config.h @@ -65,11 +65,12 @@ struct vr_config { #define VR_CFG_AMP(i) ((i) * 4) +#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) /* VrConfig Settings for 5 domains * 0 = System Agent, 1 = IA Core, 2 = Ring, * 3 = GT unsliced, 4 = GT sliced */ -enum vr_domain{ +enum vr_domain { VR_SYSTEM_AGENT, VR_IA_CORE, VR_RING, @@ -77,6 +78,19 @@ enum vr_domain{ VR_GT_SLICED, NUM_VR_DOMAINS }; +#else +/* VrConfig Settings for 4 domains + * 0 = System Agent, 1 = IA Core, + * 2 = GT unsliced, 3 = GT sliced + */ +enum vr_domain { + VR_SYSTEM_AGENT, + VR_IA_CORE, + VR_GT_UNSLICED, + VR_GT_SLICED, + NUM_VR_DOMAINS +}; +#endif void fill_vr_domain_config(void *params, int domain, const struct vr_config *cfg); diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c index 17ccd7dd93..36c2f1f403 100644 --- a/src/soc/intel/skylake/vr_config.c +++ b/src/soc/intel/skylake/vr_config.c @@ -44,6 +44,7 @@ static const struct vr_config default_configs[NUM_VR_DOMAINS] = { .icc_max = VR_CFG_AMP(34), .voltage_limit = 1520, }, +#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) [VR_RING] = { .vr_config_enable = 1, .psi1threshold = VR_CFG_AMP(20), @@ -56,6 +57,7 @@ static const struct vr_config default_configs[NUM_VR_DOMAINS] = { .icc_max = VR_CFG_AMP(34), .voltage_limit = 1520, }, +#endif [VR_GT_UNSLICED] = { .vr_config_enable = 1, .psi1threshold = VR_CFG_AMP(20), |