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author | Kayalvizhi Dhandapani <kayalvizhid@ami.com> | 2014-10-07 14:11:20 -0400 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2014-10-09 22:09:25 +0200 |
commit | a16055ae8ad2a04a7577aae351def4482d7bbab8 (patch) | |
tree | 4d86ab45168d28fa0716cad8e82dbbcfe81f787e /src/soc/intel | |
parent | 454625c5cf4adecb5b80777503bc600c8b139004 (diff) | |
download | coreboot-a16055ae8ad2a04a7577aae351def4482d7bbab8.tar.xz |
intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module added
Change-Id: I6d8622c7f343619b915442d8056aa6672dfc4f6e
Signed-off-by: Kayalvizhi Dhandapani <kayalvizhid@ami.com>
Reviewed-on: http://review.coreboot.org/7025
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/fsp_baytrail/tsc_freq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/fsp_baytrail/tsc_freq.c b/src/soc/intel/fsp_baytrail/tsc_freq.c index b74e41ea31..da7e96590c 100644 --- a/src/soc/intel/fsp_baytrail/tsc_freq.c +++ b/src/soc/intel/fsp_baytrail/tsc_freq.c @@ -21,11 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> #include <baytrail/msr.h> -#if !defined(__PRE_RAM__) -#include <baytrail/ramstage.h> -#else -#include <baytrail/romstage.h> -#endif unsigned bus_freq_khz(void) { @@ -57,6 +52,11 @@ unsigned long tsc_freq_mhz(void) } #if !defined(__SMM__) +#if !defined(__PRE_RAM__) +#include <baytrail/ramstage.h> +#else +#include <baytrail/romstage.h> +#endif void set_max_freq(void) { |