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authorLijian Zhao <lijian.zhao@intel.com>2017-10-20 09:19:07 -0700
committerMartin Roth <martinroth@google.com>2017-10-22 02:17:24 +0000
commitc85890d0d8887462e72837c3ae6dd5b6842a81cb (patch)
tree3ccbe8cd45e134361b5dd1661c6bdd76230efd95 /src/soc/intel
parentfea2429e254c41b192dd0856966d5f80eb15a07a (diff)
downloadcoreboot-c85890d0d8887462e72837c3ae6dd5b6842a81cb.tar.xz
soc/intel/cannonlake: Change max root port to 16
Cannonlake SOC support up to 16 PCI express root port. BUG=CID 1381813;1381814; Change-Id: I4df610e3fb01bd8e62be7e9c62144125f2a96c25 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/22122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/cannonlake/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 00aa6e9ac8..e45fe20fc4 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -110,7 +110,7 @@ config IED_REGION_SIZE
config MAX_ROOT_PORTS
int
- default 24
+ default 16
config SMM_TSEG_SIZE
hex