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| author | Jonathan Zhang <jonzhang@fb.com> | 2020-06-26 14:42:11 -0700 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-07-04 11:25:50 +0000 |
| commit | 29f61a2110a04b3e21f374d9ad5a853146f74485 (patch) | |
| tree | f0aee8672e1c2e67d9709471ddb49353d2e81567 /src/soc/intel | |
| parent | 37f38505f279af3cb02b9ec7c70c38c1ae0005c2 (diff) | |
| download | coreboot-29f61a2110a04b3e21f374d9ad5a853146f74485.tar.xz | |
soc/intel/xeon_sp/cpx: update HOB display code
Fix a typo to use CONFIG_DISPLAY_HOBS instead of CONFIG_DISPLAY_HOB.
Build hob display into romstage, in addition to ramstage.
Memory map HOB data is a big structure. Update the soc_display_memmap_hob()
to assist trouble shooting of FSP interface.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Iece745fe21d11b4a470ba8318201bb6e68c5da26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42841
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/hob_display.c | 11 |
2 files changed, 10 insertions, 4 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index a7ac5d7964..969fe252e5 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -10,9 +10,10 @@ subdirs-y += ../../../../cpu/intel/microcode romstage-y += romstage.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-y += chip.c acpi.c cpu.c soc_util.c -ramstage-$(CONFIG_DISPLAY_HOB) += hob_display.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx diff --git a/src/soc/intel/xeon_sp/cpx/hob_display.c b/src/soc/intel/xeon_sp/cpx/hob_display.c index d10a0f6515..4f13759ad1 100644 --- a/src/soc/intel/xeon_sp/cpx/hob_display.c +++ b/src/soc/intel/xeon_sp/cpx/hob_display.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <fsp/util.h> -#include <assert.h> #include <hob_iiouds.h> #include <hob_memmap.h> +#include <lib.h> #include <soc/soc_util.h> static const uint8_t fsp_hob_iio_uds_guid[16] = FSP_HOB_IIO_UNIVERSAL_DATA_GUID; @@ -61,20 +62,24 @@ void soc_display_memmap_hob(void) assert(hob != NULL); printk(BIOS_DEBUG, "===================== MEMORY MAP HOB DATA =====================\n"); - printk(BIOS_DEBUG, "hob: %p\n", hob); + printk(BIOS_DEBUG, "hob: %p, size: 0x%lx, structure size: 0x%lx\n", + hob, hob_size, sizeof(*hob)); printk(BIOS_DEBUG, "\tlowMemBase: 0x%x, lowMemSize: 0x%x, highMemBase: 0x%x, " "highMemSize: 0x%x\n", hob->lowMemBase, hob->lowMemSize, hob->highMemBase, hob->highMemSize); printk(BIOS_DEBUG, "\tmemSize: 0x%x, memFreq: 0x%x\n", hob->memSize, hob->memFreq); - printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d\n", hob->numberEntries); + printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d, entry size: %ld\n", + hob->numberEntries, sizeof(SYSTEM_MEMORY_MAP_ELEMENT)); for (int e = 0; e < hob->numberEntries; ++e) { const struct SystemMemoryMapElement *mem_element = &hob->Element[e]; printk(BIOS_DEBUG, "\t\tmemory_map %d BaseAddress: 0x%x, ElementSize: 0x%x, Type: 0x%x\n", e, mem_element->BaseAddress, mem_element->ElementSize, mem_element->Type); } + + hexdump(hob, sizeof(*hob)); } void soc_display_iio_universal_data_hob(void) |