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| author | Martin Roth <martinroth@google.com> | 2016-09-30 08:59:58 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-01 22:28:57 +0200 |
| commit | 3674c8240d89f030ed017e5c13298cb6a68ddd48 (patch) | |
| tree | 0b14e3d6621674924ed1147e3fb91d2dba747a04 /src/soc/intel | |
| parent | 6b63990602aaacd523da2afb5c23a641b6caa6da (diff) | |
| download | coreboot-3674c8240d89f030ed017e5c13298cb6a68ddd48.tar.xz | |
soc/intel/apollolake: Try to update BSP microcode from cbfs
The microcode for the BSP gets loaded early from the fit table, but in
case we have newer microcode in cbfs, try to load it again from cbfs.
BUG=chrome-os-partner:53013
TEST=Boot and verify that microcode tries to load into the BSP.
Change-Id: Ifd6c78d7b0eec333b79e0fe5cb6a81981b078f5d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16829
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/cpu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index 86fe3e1fd5..f3cf050415 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -73,6 +73,9 @@ static void pre_mp_init(void) { x86_setup_mtrrs_with_detect(); x86_mtrr_check(); + + /* Make sure BSP is using the microcode from cbfs */ + intel_update_microcode_from_cbfs(); } /* Find CPU topology */ |