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authorRizwan Qureshi <rizwan.qureshi@intel.com>2018-06-18 19:50:18 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-07-19 08:07:49 +0000
commit53485124513a76ebe85a80f59e8dff9915f518bd (patch)
tree33ad54a5dddfd1b27957186e35504381fd46b161 /src/soc/intel
parentb082670234819108a15da6239e481f5c9d8b30ec (diff)
downloadcoreboot-53485124513a76ebe85a80f59e8dff9915f518bd.tar.xz
Kconfig: Add config to insert ucode address in second FIT
This config is used to provide the name of a region where a microcode is located. The address of this will be added as the first entry in the FIT of the topswap bootblock. This adds a capability to associate two microcodes for each of the two bootblocks, this allows for the CPU to boot with different microcodes with 2 separate bootblocks. Change-Id: I4ee41d90bae34862aa68c9b8bd69288de1335585 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/27151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig
index fb2643ba4d..5b4a9a2095 100644
--- a/src/soc/intel/Kconfig
+++ b/src/soc/intel/Kconfig
@@ -37,3 +37,14 @@ config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
help
Set this config to a supported topswap size.
Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
+
+config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
+ string
+ depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
+ help
+ Use this config to specify the name of a FMAP region (which should
+ hold a microcode) whose address as the first entry in the topswap FIT.
+ This is useful in creating a asymmetric FIT in top swap bootblock
+ than the one in non-topswap bootblock. This string will be passed
+ onto cbfstool (-q option). cbfstool will not parse the region for MCU
+ entries, and only locate the region and insert its address into FIT.