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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-21 17:02:18 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-22 22:37:56 +0000
commit7567890110db2f7f8a686c87268911e06d4cdc8f (patch)
treecbe4e511681b451a9657650633e0265d9d2d666f /src/soc/intel
parent7a66ffb34aba44453c5a7fea75aff4d58322e94d (diff)
downloadcoreboot-7567890110db2f7f8a686c87268911e06d4cdc8f.tar.xz
soc/intel/common: Fix XHCI elog driver
Commit 56fcfb5 misused the PCH_DEVFNs passed to the XHCI elog driver, by passing them directly to pci_s_read_config32. This is incorrect, as it is the wrong PCI devfn encoding to pass to that function. BUG=b:175996770 TEST=abuild Change-Id: Id7c146c1f50ee64a725bd50f9f11a7f159013a2b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/xhci/elog.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/xhci/elog.c b/src/soc/intel/common/block/xhci/elog.c
index fb598978bd..e6a1c0f5da 100644
--- a/src/soc/intel/common/block/xhci/elog.c
+++ b/src/soc/intel/common/block/xhci/elog.c
@@ -105,8 +105,9 @@ bool xhci_update_wake_event(const struct xhci_wake_info *wake_info,
for (i = 0; i < wake_info_count; ++i) {
/* Assumes BAR0 is MBAR */
- mmio_base = pci_s_read_config32(wake_info[i].xhci_dev,
- PCI_BASE_ADDRESS_0);
+ pci_devfn_t devfn = PCI_DEV(0, PCI_SLOT(wake_info[i].xhci_dev),
+ PCI_FUNC(wake_info[i].xhci_dev));
+ mmio_base = pci_s_read_config32(devfn, PCI_BASE_ADDRESS_0);
mmio_base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
usb_info = soc_get_xhci_usb_info(wake_info[i].xhci_dev);