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authorKein Yuan <kein.yuan@intel.com>2014-04-02 16:29:52 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-10-28 18:01:36 +0100
commit787809e9ab117475847e8b2daf0c70e3cfff6ff4 (patch)
treeb020942e998a543b4d4708064ef5fbeee3f4d9fe /src/soc/intel
parent1131889570836da2ee63f5eacb46ce31d3a55276 (diff)
downloadcoreboot-787809e9ab117475847e8b2daf0c70e3cfff6ff4.tar.xz
Baytrail/dptf: Always return 0 in TCPU._PPC
According to DPTF team _PPC in TCPU must return 0 always. BUG=chromium:355964 TEST=Pass build. BRANCH=rambi Change-Id: I76f0da27757ba4717f0e392bcd80e890d925061a Original-Change-Id: I8b9e17e5479e8a226cb11cd43ce888a3e4dead73 Signed-off-by: Kein Yuan <kein.yuan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/193069 Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> (cherry picked from commit 6dbcc677ceebbaf832e41e6db1e6cf171e2e231f) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7215 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/acpi/dptf/cpu.asl7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
index 87f1d1926a..3cbfc5f672 100644
--- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
@@ -2,7 +2,6 @@ External (\_PR.CPU0._TSS, MethodObj)
External (\_PR.CPU0._TPC, MethodObj)
External (\_PR.CPU0._PTC, PkgObj)
External (\_PR.CPU0._TSD, PkgObj)
-External (\_PR.CPU0._PPC, MethodObj)
External (\_PR.CPU0._PSS, MethodObj)
Device (TCPU)
@@ -86,11 +85,7 @@ Device (TCPU)
Method (_PPC)
{
- If (CondRefOf (\_PR.CPU0._PPC)) {
- Return (\_PR.CPU0._PPC)
- } Else {
- Return (0)
- }
+ Return (0)
}
Method (SPPC, 1)