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authorElyes HAOUAS <ehaouas@noos.fr>2020-02-20 20:04:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-23 09:28:55 +0000
commita5b0bc4b34a553aa17d087fce4d371ea138c00a9 (patch)
tree8a199fbfbf6cf6b6e906a56590f1aa1bc28d2c6b /src/soc/intel
parente9aef1fe4548da7bf65f11aec48ff3b40e6461fa (diff)
downloadcoreboot-a5b0bc4b34a553aa17d087fce4d371ea138c00a9.tar.xz
src: capitalize 'APIC'
Change-Id: I487fb53bb2b011d214f002fc200ade2f128a4cc6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/include/soc/gpio.h14
-rw-r--r--src/soc/intel/broadwell/smi.c2
2 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index d6be80fde2..3c1e7f37dd 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -196,49 +196,49 @@
.io_sel = GPIO_DIR_INPUT, \
.is_gpio = 1 }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_LEVEL_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_LEVELHIGH_NO_PULL \
{ .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_LEVEL_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_LEVELLOW_PU_20K \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_LEVEL_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_EDGELOW_PU_20K \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_EDGEHIGH_PD_20K \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_EDGE_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_EDGELOW_PD_20K \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
-/* Direct / dedicated IRQ input - pass signal directly to apic */
+/* Direct / dedicated IRQ input - pass signal directly to APIC */
#define GPIO_DIRQ_EDGEBOTH_PU_20K \
{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
| PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ| PAD_TNE_IRQ | PAD_EDGE_IRQ, \
diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c
index b26700e267..b1be1faa69 100644
--- a/src/soc/intel/broadwell/smi.c
+++ b/src/soc/intel/broadwell/smi.c
@@ -71,7 +71,7 @@ static void __unused southbridge_trigger_smi(void)
* - Writes to io 0xb2 (APMC)
* - Writes to the Local Apic ICR with Delivery mode SMI.
*
- * Using the local apic is a bit more tricky. According to
+ * Using the local APIC is a bit more tricky. According to
* AMD Family 11 Processor BKDG no destination shorthand must be
* used.
* The whole SMM initialization is quite a bit hardware specific, so