diff options
author | Andrey Petrov <anpetrov@fb.com> | 2019-07-31 22:08:55 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-08-14 03:35:07 +0000 |
commit | bb9506121f709f452d18d135ed163166f76e44e4 (patch) | |
tree | f848a445f2ea3ecee29364935bd2469b6d4ad3a5 /src/soc/intel | |
parent | f377fafd941a44252c4c7527ba08f798d222e7ff (diff) | |
download | coreboot-bb9506121f709f452d18d135ed163166f76e44e4.tar.xz |
soc/fsp_broadwell_de: Implement SMBus read/write over IMC
Add read/write functions to hook it up with existing SPD retrieval code.
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Change-Id: I9f5993dc795badf72751a4e6c9d974119a653e30
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34679
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h | 5 | ||||
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/smbus-imc.c | 59 |
3 files changed, 65 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 52f16d3ade..70cb2de6ed 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -14,6 +14,7 @@ subdirs-y += ../../../lib/fsp romstage-y += gpio.c romstage-y += memmap.c romstage-y += tsc_freq.c +romstage-y += smbus-imc.c postcar-y += tsc_freq.c diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h b/src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h index 5fb8113980..ee0b80e49b 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h @@ -126,4 +126,9 @@ #define SMM_FUNC 0x06 #define SMM_DEV_FUNC PCI_DEVFN(SMM_DEV, SMM_FUNC) +#define IMC_DEV0 19 +#define IMC_FUNC0 0 + +#define IMC_DEV PCI_DEV(QPI_BUS, IMC_DEV0, IMC_FUNC0) + #endif /* _SOC_PCI_DEVS_H_ */ diff --git a/src/soc/intel/fsp_broadwell_de/smbus-imc.c b/src/soc/intel/fsp_broadwell_de/smbus-imc.c new file mode 100644 index 0000000000..35e42da409 --- /dev/null +++ b/src/soc/intel/fsp_broadwell_de/smbus-imc.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stddef.h> +#include <console/console.h> +#include <device/pci_def.h> +#include <device/early_smbus.h> +#include <intelblocks/imc.h> +#include <soc/pci_devs.h> +#include <spd.h> + +/* read word, return value on success */ +uint16_t smbus_read_word(u32 smbus_dev, u8 addr, u8 offset) +{ + uint16_t res = 0; + + if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_EEPROM, IMC_DATA_WORD, + IMC_CONTROLLER_ID0, IMC_READ, &res) + == 0) { + return res; + } + return 0; +} + +/* read byte, return value on success */ +uint8_t smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset) +{ + uint16_t res = 0; + + if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_EEPROM, IMC_DATA_BYTE, + IMC_CONTROLLER_ID0, IMC_READ, &res) + == 0) { + return res; + } + return 0; +} + +/* write byte, return 0 on success, -1 otherwise */ +uint8_t smbus_write_byte(u32 smbus_dev, u8 addr, u8 offset, u8 value) +{ + if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_WP_EEPROM, IMC_DATA_BYTE, + IMC_CONTROLLER_ID0, IMC_WRITE, &value) + == 0) { + return 0; + } + return -1; +} |