src: Use include <delay.h> when appropriate

Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Guckian

21 files changed, 7 insertions, 25 deletions

diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 73c0d152d8..5d6d504a86 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -16,14 +16,12 @@
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <drivers/intel/gma/opregion.h>
 #include <reg_script.h>
 #include <stdlib.h>
-
 #include <soc/gfx.h>
 #include <soc/iosf.h>
 #include <soc/nvs.h>
diff --git a/src/soc/intel/braswell/sata.c b/src/soc/intel/braswell/sata.c
index ab167455da..80031e6907 100644
--- a/src/soc/intel/braswell/sata.c
+++ b/src/soc/intel/braswell/sata.c
@@ -18,7 +18,6 @@
 #include <soc/ramstage.h>
 #include <soc/sata.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c
index d0296e0b2a..7658515c12 100644
--- a/src/soc/intel/broadwell/adsp.c
+++ b/src/soc/intel/broadwell/adsp.c
@@ -20,7 +20,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <soc/adsp.h>
 #include <soc/device_nvs.h>
 #include <soc/iobp.h>
diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c
index a03fd5431b..c8a4e7a288 100644
--- a/src/soc/intel/broadwell/ehci.c
+++ b/src/soc/intel/broadwell/ehci.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c
index 9ef51c6cd5..d1aee924f4 100644
--- a/src/soc/intel/broadwell/hda.c
+++ b/src/soc/intel/broadwell/hda.c
@@ -22,7 +22,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <soc/intel/common/hda_verb.h>
 #include <soc/pch.h>
 #include <soc/ramstage.h>
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index c831c2c5bc..8438ab45db 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -15,7 +15,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c
index 1b2489cc5c..d44e1532b3 100644
--- a/src/soc/intel/broadwell/minihd.c
+++ b/src/soc/intel/broadwell/minihd.c
@@ -21,7 +21,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <soc/intel/common/hda_verb.h>
 #include <soc/ramstage.h>
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index 06c05c0df3..e555588a2e 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -15,7 +15,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/broadwell/romstage/uart.c b/src/soc/intel/broadwell/romstage/uart.c
index a3c4c61975..58450dd834 100644
--- a/src/soc/intel/broadwell/romstage/uart.c
+++ b/src/soc/intel/broadwell/romstage/uart.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/early_variables.h>
-#include <delay.h>
 #include <device/pci_def.h>
 #include <reg_script.h>
 #include <stdint.h>
diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c
index 7c6025cb75..56fefa5c05 100644
--- a/src/soc/intel/cannonlake/lpc.c
+++ b/src/soc/intel/cannonlake/lpc.c
@@ -15,8 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -34,6 +32,8 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
+#include "chip.h"
+
 /*
 * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve
 * certain memory range as reserved range for BIOS usage.
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 9dbfbd47ee..c847390d40 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -21,7 +21,6 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
 #include <soc/cpu.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c
index a3e278f3f7..61f14a935c 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_early.c
+++ b/src/soc/intel/common/block/systemagent/systemagent_early.c
@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <device/pci_ops.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <intelblocks/systemagent.h>
diff --git a/src/soc/intel/fsp_baytrail/gfx.c b/src/soc/intel/fsp_baytrail/gfx.c
index 6bde32e6fd..dab997275d 100644
--- a/src/soc/intel/fsp_baytrail/gfx.c
+++ b/src/soc/intel/fsp_baytrail/gfx.c
@@ -15,13 +15,11 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <reg_script.h>
 #include <stdlib.h>
-
 #include <soc/gfx.h>
 #include <soc/iosf.h>
 #include <soc/pci_devs.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c
index 36a01c6fcb..854bd76a38 100644
--- a/src/soc/intel/fsp_broadwell_de/smihandler.c
+++ b/src/soc/intel/fsp_broadwell_de/smihandler.c
@@ -15,7 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <types.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c
index a3bce93a7d..8fe0507255 100644
--- a/src/soc/intel/icelake/lpc.c
+++ b/src/soc/intel/icelake/lpc.c
@@ -13,9 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -33,6 +31,8 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
+#include "chip.h"
+
 /*
 * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve
 * certain memory range as reserved range for BIOS usage.
diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c
index b2bb572800..02b5892946 100644
--- a/src/soc/intel/quark/gpio_i2c.c
+++ b/src/soc/intel/quark/gpio_i2c.c
@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/i2c_simple.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h
index d06ed82342..27231f9e11 100644
--- a/src/soc/intel/quark/include/soc/reg_access.h
+++ b/src/soc/intel/quark/include/soc/reg_access.h
@@ -19,7 +19,6 @@
 #include <cpu/x86/cr.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
-#include <delay.h>
 #include <fsp/util.h>
 #include <reg_script.h>
 #include <soc/IntelQNCConfig.h>
diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c
index df171f590a..1063525e03 100644
--- a/src/soc/intel/quark/reg_access.c
+++ b/src/soc/intel/quark/reg_access.c
@@ -19,6 +19,7 @@
 #include <assert.h>
 #include <cpu/x86/mtrr.h>
 #include <console/console.h>
+#include <delay.h>
 #include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
diff --git a/src/soc/intel/quark/romstage/pcie.c b/src/soc/intel/quark/romstage/pcie.c
index dc54a3274c..747ac2be6d 100644
--- a/src/soc/intel/quark/romstage/pcie.c
+++ b/src/soc/intel/quark/romstage/pcie.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <device/device.h>
 #include <soc/pci_devs.h>
 #include <soc/reg_access.h>
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 0343a237f8..3e77b03c3f 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -33,7 +33,6 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/mp_init.h>
diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c
index 0110022274..8d6228c096 100644
--- a/src/soc/intel/skylake/lpc.c
+++ b/src/soc/intel/skylake/lpc.c
@@ -15,8 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -30,6 +28,8 @@
 #include <soc/pcr_ids.h>
 #include <soc/intel/common/block/lpc/lpc_def.h>
 
+#include "chip.h"
+
 /**
   PCH preserved MMIO range, 24 MB, from 0xFD000000 to 0xFE7FFFFF
 **/