summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2015-10-26 15:27:29 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-28 22:27:54 +0100
commit823259332cbffdde8394b750e4320c476f3eab02 (patch)
tree4a6f208760fb6ffe5ae4ee71efcff98dc8835030 /src/soc/intel
parentba5487acf47b3d9a8e36ec8538659bb7eb8cf7a1 (diff)
downloadcoreboot-823259332cbffdde8394b750e4320c476f3eab02.tar.xz
intel/skylake: Add USB2 port config for max settings
Add a new USB2_PORT_MAX with the max possible settings (56mV) for the TX and Pre-emphasis bias values. Also fix the settings for the detachable tablet config to match the skylake HSIO tuning guide as it was incorrect before. BUG=chrome-os-partner:45367 BRANCH=none TEST=build and boot on glados Change-Id: Id9ccc683fe92c962095347e0d1a0afeb082c821f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e5d56831e75f98a3c75ed333e4b79b1a37f14792 Original-Change-Id: Ia2e3e93236f1463201f83a1cae28349de2836110 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/308729 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12203 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/skylake/include/soc/usb.h17
1 files changed, 13 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h
index 29b603afec..ee1e4880d1 100644
--- a/src/soc/intel/skylake/include/soc/usb.h
+++ b/src/soc/intel/skylake/include/soc/usb.h
@@ -65,6 +65,15 @@ struct usb2_port_config {
* - Internal device down
*/
+/* Max TX and Pre-emp settings */
+#define USB2_PORT_MAX { \
+ .enable = 1, \
+ .tx_bias = USB2_BIAS_56MV, \
+ .tx_emp_enable = USB2_PRE_EMP_ON, \
+ .pre_emp_bias = USB2_BIAS_56MV, \
+ .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \
+}
+
/* 11.5"-12" */
#define USB2_PORT_LONG { \
.enable = 1, \
@@ -140,10 +149,10 @@ struct usb2_port_config {
/* 2:1 Detachable, 2"-4" on tablet + 2"-4" on base */
#define USB2_PORT_DETACHABLE_TABLET { \
.enable = 1, \
- .tx_bias = USB2_BIAS_17MV, \
- .tx_emp_enable = USB2_PRE_EMP_ON | USB2_DE_EMP_ON, \
- .pre_emp_bias = USB2_BIAS_45MV, \
- .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, \
+ .tx_bias = USB2_BIAS_56MV, \
+ .tx_emp_enable = USB2_PRE_EMP_ON, \
+ .pre_emp_bias = USB2_BIAS_56MV, \
+ .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \
}
struct usb3_port_config {