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author | Werner Zeh <werner.zeh@siemens.com> | 2015-10-01 13:24:40 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-01 13:49:57 +0000 |
commit | 8b293225573ef05364b741003a1fd95e49794cb1 (patch) | |
tree | 754022511e45b482d84574c07229ab824f8997e7 /src/soc/intel | |
parent | bd0dab2b267e308e1882b51ecda7b19f8c895201 (diff) | |
download | coreboot-8b293225573ef05364b741003a1fd95e49794cb1.tar.xz |
intel/fsp_baytrail: Remove unused MICROCODE_INCLUDE_PATH from Kconfig
Since fsp_baytrail was refactored to use microcode.bin
in 3rdparty/blobs, we do not need MICROCODE_INCLUDE_PATH any more.
Change-Id: I4382b0c174877186bd37fbff21f3269136d15e10
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/11762
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index d51a238f0d..36229de7a2 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -86,11 +86,6 @@ config VGA_BIOS_ID This is the default PCI ID for the Bay Trail graphics devices. This string names the vbios ROM in cbfs. -config MICROCODE_INCLUDE_PATH - string "Microcode Include path" - default "../intel/cpu/baytrail/microcode" - depends on SUPPORT_CPU_UCODE_IN_CBFS - config CPU_MICROCODE_CBFS_LOC hex default 0xfff10040 |