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| author | Aaron Durbin <adurbin@chromium.org> | 2016-11-29 23:14:25 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-12-01 08:17:42 +0100 |
| commit | b4afe3c19747758412c734132e5e342a9b3572b1 (patch) | |
| tree | 014c675dd3ca4bc7bb1407f4969d593ba78bc8ce /src/soc/intel | |
| parent | d008413a3c46d4346f3cc398bbfd60b875ff3084 (diff) | |
| download | coreboot-b4afe3c19747758412c734132e5e342a9b3572b1.tar.xz | |
lib/nhlt: add support for setting the oem_revision
In the ACPI header there's an OEM revision field that was previously
just being implicitly set to 0. Allow for a board to provide a
non-zero value for this field.
Change-Id: Icd40c1c162c2645b3990a6f3361c592706251f82
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17650
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/nhlt.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/common/nhlt.c b/src/soc/intel/common/nhlt.c index 03a4b4f03c..a268ea6c3c 100644 --- a/src/soc/intel/common/nhlt.c +++ b/src/soc/intel/common/nhlt.c @@ -19,11 +19,12 @@ uintptr_t nhlt_soc_serialize(struct nhlt *nhlt, uintptr_t acpi_addr) { - return nhlt_soc_serialize_oem_overrides(nhlt, acpi_addr, NULL, NULL); + return nhlt_soc_serialize_oem_overrides(nhlt, acpi_addr, NULL, NULL, 0); } uintptr_t nhlt_soc_serialize_oem_overrides(struct nhlt *nhlt, - uintptr_t acpi_addr, const char *oem_id, const char *oem_table_id) + uintptr_t acpi_addr, const char *oem_id, const char *oem_table_id, + uint32_t oem_revision) { global_nvs_t *gnvs; @@ -37,5 +38,5 @@ uintptr_t nhlt_soc_serialize_oem_overrides(struct nhlt *nhlt, gnvs->nhll = nhlt_current_size(nhlt); return nhlt_serialize_oem_overrides(nhlt, acpi_addr, - oem_id, oem_table_id); + oem_id, oem_table_id, oem_revision); } |