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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2020-06-05 09:48:57 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-18 08:22:21 +0000 |
| commit | d8aff6098a837a028eed097ef4000fb63c909830 (patch) | |
| tree | 9b85a485e380e7dff39b349a234ce53809c9cc82 /src/soc/intel | |
| parent | 8d6f587da4e33e3bf5a95fd4f9f44e894fd0c688 (diff) | |
| download | coreboot-d8aff6098a837a028eed097ef4000fb63c909830.tar.xz | |
mb/google/volteer/variants/terrador: Disable EC SW sync
It is the reference board of TGL-Y platform, we want to disable EC SW
sync for Proto stage, it would be re-enabled before EVT stage.
BUG=b:156435028
TEST=FW_NAME=terrador emerge-volteer coreboot chromeos-bootimage
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Ie7999e24e9c173d4870b35ce1728f3dcc8dcac29
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42090
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions