diff options
author | Subrata Banik <subrata.banik@intel.com> | 2017-02-16 16:16:37 +0530 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-03-06 20:44:17 +0100 |
commit | e074d62e181c58d0cd215f93af7c8e70e2e31601 (patch) | |
tree | 762f95143ba165960ef9036e31c3b7b0df5b1025 /src/soc/intel | |
parent | c2fd0a2114f2d806302ea56c70593ab21a46aa25 (diff) | |
download | coreboot-e074d62e181c58d0cd215f93af7c8e70e2e31601.tar.xz |
soc/intel/skylake: Use intel/common/xhci driver
Change-Id: I7bd83d293fcc1848f6f64526d8f38d010c1f69a3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18223
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/skylake/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/xhci.c | 43 |
3 files changed, 2 insertions, 44 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 725a25db80..c1b585f613 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -48,6 +48,8 @@ config CPU_SPECIFIC_OPTIONS select RTC select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE + select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_LPSS_I2C select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 4b6fcfc1f1..2a6b15244b 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -90,7 +90,6 @@ ramstage-y += tsc_freq.c ramstage-y += uart.c ramstage-$(CONFIG_UART_DEBUG) += uart_debug.c ramstage-y += vr_config.c -ramstage-y += xhci.c smm-y += cpu_info.c smm-y += gpio.c diff --git a/src/soc/intel/skylake/xhci.c b/src/soc/intel/skylake/xhci.c deleted file mode 100644 index 0912f10a7e..0000000000 --- a/src/soc/intel/skylake/xhci.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <delay.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include <soc/ramstage.h> -#include <soc/cpu.h> - -static struct device_operations usb_xhci_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .ops_pci = &soc_pci_ops, -}; - -static const unsigned short pci_device_ids[] = { - 0x9d2f, /* SunRisePoint LP */ - 0xa12f, /* KBL-H*/ - 0 -}; - -static const struct pci_driver pch_usb_xhci __pci_driver = { - .ops = &usb_xhci_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .devices = pci_device_ids, -}; |