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author | Aaron Durbin <adurbin@chromium.org> | 2017-04-27 14:14:05 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-04-28 15:58:49 +0200 |
commit | f39692ee3e6cd63714e9ec1b3a3243636bb5ca1b (patch) | |
tree | 09c7e04b7eb27c33fcfb3f811398dc9336a4704e /src/soc/lowrisc | |
parent | 9c86aafe5a18068edb824faf4d2e44f0fefc6411 (diff) | |
download | coreboot-f39692ee3e6cd63714e9ec1b3a3243636bb5ca1b.tar.xz |
soc/intel/apollolake: fix system reset eventlog
The SRS bit which is supposed to indicate reset button press
is non-functional. If it did work the system reset event it
was associated with is overly specific. Therefore, use the
warm reset status bit.
BUG=b:37687843
Change-Id: I34dd09c03d2bca72da9a5cdf23121e0d0e621fa6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19484
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/lowrisc')
0 files changed, 0 insertions, 0 deletions